
TME-104-CLR-86DX-R0V2.doc
Rev. 0.2
29(
44
)
Differential signal and “Global Clock” connector 2 (X15)
Connector type
IDC30 pin header 2.0 mm
Matching connector
Pin
IDC30 pin female connector 2.0 mm
Signal
Pin
Signal
1
3.3 V
8
2
3.3 V
9
3
FPGA_IO_DIFF13_P
4
FPGA_IO_DIFF13_N
5
FPGA_IO_DIFF14_P
6
FPGA_IO_DIFF14_N
7
FPGA_IO_DIFF15_P
8
FPGA_IO_DIFF15_N
9
FPGA_IO_DIFF16_P
10
FPGA_IO_DIFF16_N
11
FPGA_IO_GCLK_DIFF17_P
12
FPGA_IO_GCLK_DIFF17_N
13
FPGA_IO_GCLK_DIFF18_P
14
FPGA_IO_GCLK_DIFF18_N
15
FPGA_IO_GCLK_DIFF19_P
16
FPGA_IO_GCLK_DIFF19_N
17
FPGA_IO_GCLK_DIFF20_P
18
FPGA_IO_GCLK_DIFF20_N
19
FPGA_IO_DIFF21_P
20
FPGA_IO_DIF21_N
21
FPGA_IO_DIFF22_P
22
FPGA_IO_DIFF22_N
23
FPGA_IO_DIFF23_P
24
FPGA_IO_DIFF23_N
25
FPGA_IO_DIFF24_P
26
FPGA_IO_DIFF24_N
27
FPGA_IO_DIFF25_P
28
FPGA_IO_DIFF25_N
29
GND
30
GND
Single ended signal connector 1 (X14)
Connector type
IDC30 pin header 2.0 mm
Matching connector
Pin
IDC30 pin female connector 2.0 mm
Signal
Pin
Signal
1
3.3 V
9
2
3.3 V
9
3
FPGA_IO_SE14
4
FPGA_IO_SE15
5
FPGA_IO_SE16
6
FPGA_IO_SE17
7
FPGA_IO_SE18
8
FPGA_IO_SE19
9
FPGA_IO_SE20
10
FPGA_IO_SE21
11
FPGA_IO_SE22
12
FPGA_IO_SE23
13
FPGA_IO_SE24
14
FPGA_IO_SE25
15
FPGA_IO_SE26
16
FPGA_IO_SE27
17
FPGA_IO_SE28
18
FPGA_IO_SE29
19
FPGA_IO_SE30
20
FPGA_IO_SE31
21
FPGA_IO_SE32
22
FPGA_IO_SE33
23
FPGA_IO_SE34
24
FPGA_IO_SE35
25
FPGA_IO_SE36
26
FPGA_IO_SE37
27
FPGA_IO_SE38
28
FPGA_IO_SE39
29
GND
30
GND
8,9
0.5 A is the maximum current for that pin
X14
X15