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13

LTC1736

APPLICATIO S I FOR ATIO

W

U

U

U

C

OUT

 required ESR < 2.2 R

SENSE

C

OUT

 > 1/(8fR

SENSE

)

The first condition relates to the ripple current into the ESR
of the output capacitance while the second term guaran-
tees that the output capacitance does not significantly
discharge during the operating frequency period due to
ripple current. The choice of using smaller output capaci-
tance increases the ripple voltage due to the discharging
term but can be compensated for by using capacitors of
very low ESR to maintain the ripple voltage at or below
50mV. The I

TH

 pin OPTI-LOOP compensation compo-

nents can be optimized to provide stable, high perfor-
mance transient response regardless of the output capaci-
tors selected.

The selection of output capacitors for CPU or other appli-
cations with large load current transients is primarily
determined by the voltage tolerance specifications of the
load. The resistive component of the capacitor, ESR,
multiplied by the load current change plus any output
voltage ripple must be within the voltage tolerance of the
load (CPU).

The required ESR due to a load current step is:

R

ESR

 < 

V/

I

where 

I is the change in current from full load to zero load

(or minimum load) and 

V is the allowed voltage deviation

(not including any droop due to finite capacitance).

The amount of capacitance needed is determined by the
maximum energy stored in the inductor. The capacitance
must be sufficient to absorb the change in inductor current
when a high current to low current transition occurs. The
opposite load current transition is generally determined by
the control loop OPTI-LOOP components, so make sure
not to over compensate and slow down the response. The
minimum capacitance to assure the inductors’ energy is
adequately absorbed is:

C

L

I

V V

OUT

OUT

>

( )

( )

2

2

where 

I is the change in load current.

Larger diodes can result in additional transition losses due
to their larger junction capacitance. The diode may be
omitted if the efficiency loss can be tolerated.

C

IN

 Selection

In continuous mode, the source current of the top
N-channel MOSFET is a square wave of duty cycle V

OUT

/

V

IN

. To prevent large voltage transients, a low ESR input

capacitor sized for the maximum RMS current must be
used. The maximum RMS capacitor current is given by:

I

I

V

V

V

V

RMS

O MAX

OUT

IN

IN

OUT







(

)

/

– 1

1 2

This formula has a maximum at V

IN 

= 2V

OUT

, where I

RMS

= I

OUT

/2. This simple worst-case condition is commonly

used for design because even significant deviations do not
offer much relief. Note that capacitor manufacturers’
ripple current ratings are often based on only 2000 hours
of life. This makes it advisable to further derate the
capacitor, or to choose a capacitor rated at a higher
temperature than required. Several capacitors may also be
paralleled to meet size or height requirements in the
design. Always consult the manufacturer if there is any
question.

C

OUT

 Selection

The selection of C

OUT

 is primarily determined by the

effective series resistance (ESR) to minimize voltage ripple.
The output ripple (

V

OUT

) in continuous mode is deter-

mined by:

V

I ESR

fC

OUT

L

OUT

+







1

8

Where f = operating frequency, C

OUT 

= output capaci-

tance, and 

I

= ripple current in the inductor. The output

ripple is highest at maximum input voltage since 

I

L

increases with input voltage. Typically, once the ESR
requirement for C

OUT

 has been met, the RMS current

rating generally far exceeds the I

RIPPLE(P-P)

 requirement.

With 

I

= 0.3I

OUT(MAX)

 the output ripple will be less than

50mV at max V

IN

 assuming:

Summary of Contents for LTC1736

Page 1: ...allowing maximum flexibility inoptimizingefficiency Theoutputvoltageismonitoredby a power good window comparator that indicates when the output is within 7 5 of its programmed value Protection feature...

Page 2: ...TA 25 C VIN 15V VRUN SS 5V unless otherwise noted SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS Main Control Loop VOSENSE Output Voltage Set Accuracy Note 3 See Table 1 1 VLINEREG Reference Voltage L...

Page 3: ...n Note 9 Rise and fall times are measured using 10 and 90 levels Delay times are measured using 50 levels f C pF I I OSC OSC CHG DIS 8 477 10 11 1 1 11 1 SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS...

Page 4: ...30 95 EXTVCC OPEN VOUT 1 6V FIGURE 1 IOUT 5A IOUT 0 5A LOAD CURRENT A 0 NORMALIZED V OUT 0 2 0 1 8 1736 G05 0 3 0 4 2 4 6 12 10 0 FCB 0V VIN 15V FIGURE 1 Load Regulation LOAD CURRENT A 0 0 I TH VOLTA...

Page 5: ...0 CURRENT SENSE THRESHOLD mV 30 50 70 90 2 1736 G13 10 10 20 40 60 80 0 20 30 0 5 1 1 5 2 5 VRUN SS V 0 0 V ITH V 0 5 1 0 1 5 2 0 2 5 1 2 3 4 1736 G15 5 6 VOSENSE 0 7V VITH vs VRUN SS TEMPERATURE C 4...

Page 6: ...V IL 5A DIV 1736 G22 5ms DIV VIN 15V VOUT 1 6V RLOAD 0 16 VOUT RIPPLE Synchronized VOUT 10mV DIV IL 5A DIV 1736 G23 10 s DIV EXT SYNC f fO VIN 15V VOUT 1 6V VOUT RIPPLE Burst Mode Operation VOUT 20mV...

Page 7: ...VFBis0 8Vwhen the output is in regulation This pin can be bypassed to SGND with 50pF to 100pF VOSENSE Pin 10 Receives the remotely sensed feedback voltage from the output VID0 to VID4 Pins 11 to 15 Di...

Page 8: ...t com parator I2 or the beginning of the next cycle The top MOSFET driver is powered from a floating bootstrap capacitor CB This capacitor is normally re chargedfromINTVCC throughanexternalSchottkydio...

Page 9: ...is resumed Burst Mode operation is disabled by comparator F when the FCB pin is brought below 0 8V This forces continuous operation and can assist second ary winding regulation When the FCB pin is dri...

Page 10: ...ever lower frequency operation re quires more inductance for a given amount of ripple current TheLTC1736usesaconstant frequencyarchitecturewith the frequency determined by an external oscillator capac...

Page 11: ...uehasadirecteffectonripplecurrent The inductor ripple current IL decreases with higher induc tance or frequency and increases with higher VIN or VOUT I f L V V V L OUT OUT IN 1 1 Accepting larger valu...

Page 12: ...the MOSFETs as well most of the logic level MOSFETs are limited to 30V or less SelectioncriteriaforthepowerMOSFETsincludethe ON resistance RDS ON reverse transfer capacitance CRSS input voltage and ma...

Page 13: ...te and slow down the response The minimum capacitance to assure the inductors energy is adequately absorbed is C L I V V OUT OUT 2 2 where I is the change in load current Largerdiodescanresultinadditi...

Page 14: ...a tions of different capacitor types have proven to be a very cost effective solution Remember also to include high frequency decoupling capacitors They should be placed as close as possible to the po...

Page 15: ...to the LTC1735 data sheet for details The charge pump has the advantage of simple magnetics Output Voltage Programming Theoutputvoltageisdigitallysettolevelsbetween0 925V and 2 00V using the voltage i...

Page 16: ...cross the gate source of the MOSFET This enhances the MOSFET and turns on the topside switch The switch node voltage SW rises to VIN and the BOOST pin rises to VIN INTVCC The value of the boost capaci...

Page 17: ...Latchoff The RUN SS pin also provides the ability to shut off the controller and latchoff when an overcurrent condition is detected The RUN SS capacitor CSS is used initially to turn on and limit the...

Page 18: ...ple current is determined by the minimum on time tON MIN of the LTC1736 less than 200ns the input voltage and inductor value IL SC tON MIN VIN L The resulting short circuit current is I mV R I SC SENS...

Page 19: ...forced In this case the top and bottom MOSFETs continue to be driven synchronously regardless of the load on the main output Burst Mode operation is disabled and current reversal is allowed in the ind...

Page 20: ...Efficiency 100 L1 L2 L3 APPLICATIO S I FOR ATIO W U U U where L1 L2 etc are the individual losses as a percent age of input power Although all dissipative elements in the circuit produce losses four m...

Page 21: ...behavior but also provides a DC coupled and AC filtered closed loop response test point The DC step rise time and settling at this test point truly reflects the closed loop response Assuming a pre dom...

Page 22: ...oad This offset is limited to 30mV at the input of the error amplifier The resulting change in output voltage is the product of input offset and the feedback voltage divider ratio Figure 6 shows a CPU...

Page 23: ...fset ITH OUT DC L ITH ITH 2 At full load current V A A V A V V ITH MAX P P 15 5 2 0 084 0 3 1 77 At minimum load current V A A V A V V ITH MIN P P 0 2 2 2 0 084 0 3 0 40 In this circuit VITH changes f...

Page 24: ...siderably with active voltage positioning Refer to Design Solutions 10 for more information about active voltage positioning Automotive Considerations Plugging into the Cigarette Lighter As battery po...

Page 25: ...paral leled Choosing Fairchild FDS6680A MOSFETs yields a parallel RDS ON of 0 0065 The total power dissipaton for both bottom MOSFETs again assuming T 50 C is P V V V A mW SYNC 22 1 6 22 12 1 1 0 0065...

Page 26: ...NSE and SENSE should be as close as possibletotheLTC1736 Ensureaccuratecurrentsens ing with kelvin connections as shown in Figure 11 Series resistance can be added to the SENSE lines to increase noise...

Page 27: ...onofitscircuitsasdescribedhereinwillnotinfringeonexistingpatentrights G24 SSOP 1098 0 13 0 22 0 005 0 009 0 8 0 55 0 95 0 022 0 037 5 20 5 38 0 205 0 212 7 65 7 90 0 301 0 311 1 2 3 4 5 6 7 8 9 10 11...

Page 28: ...ep Down Controllers 100 DC Burst Mode Operation VIN 20V LTC1149 High Efficiency Synchronous Step Down Controller 100 DC Std Threshold MOSFETs VIN 48V LTC1159 High Efficiency Synchronous Step Down Cont...

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