10
LTC1736
OPERATIO
U
(Refer to Functional Diagram)
INTV
CC
/EXTV
CC
Power
Power for the top and bottom MOSFET drivers and most
of the internal circuitry of the LTC1736 is derived from the
INTV
CC
pin. When the EXTV
CC
pin is left open, an internal
5.2V low dropout regulator supplies the INTV
CC
power
from V
IN
. If EXTV
CC
is raised above 4.7V, the internal
regulator is turned off and an internal switch connects
EXTV
CC
to INTV
CC
. This allows a high efficiency source,
such as the notebook main 5V system supply or a second-
ary output of the converter itself, to provide the INTV
CC
power. Voltages up to 7V can be applied to EXTV
CC
for
additional gate drive capability.
To provide clean start-up and to protect the MOSFETs,
undervoltage lockout is used to keep both MOSFETs off
until the input voltage is above 3.5V.
VID Control
Bits VID0 to VID4 are logic inputs setting the output volt-
age using an internal 5-bit DAC as a feedback resistive
voltage divider. The output voltage can be set in 50mV or
25mV increments from 0.925V to 2.0V according to
Table 1. Pins VID0 to VID4 are internally pulled up to
VIDV
CC
.
PGOOD
A window comparator monitors the output voltage and its
open-drain output is pulled low when the divided down
output voltage is not within
±
7.5% of the reference voltage
of 0.8V.
R
mV
I
SENSE
MAX
=
50
C
OSC
Selection for Operating Frequency
and Synchronization
The choice of operating frequency and inductor value is a
trade-off between efficiency and component size. Low
frequency operation improves efficiency by reducing
MOSFET switching losses, both gate charge loss and
transition loss. However, lower frequency operation re-
quires more inductance for a given amount of ripple
current.
The LTC1736 uses a constant-frequency architecture with
the frequency determined by an external oscillator capaci-
tor C
OSC
. Each time the topside MOSFET turns on, the
voltage on C
OSC
is reset to ground. During the on-time
C
OSC
is charged by a fixed current. When the voltage on the
capacitor reaches 1.19V, C
OSC
is reset to ground. The
process then repeats.
The value of C
OSC
is calculated from the desired operating
frequency assuming no external clock input on the FCB
pin:
APPLICATIO S I FOR ATIO
W
U
U
U
The basic LTC1736 application circuit is shown in
Figure 1 on the first page of this data sheet. External
component selection is driven by the load requirement
and begins with the selection of R
SENSE
. Once R
SENSE
is
known, C
OSC
and L can be chosen. Next, the power MOS-
FETs and D1 are selected. The operating frequency and the
inductor are chosen based largely on the desired amount
of ripple current. Finally, C
IN
is selected for its ability to
handle the large RMS current into the converter and C
OUT
is chosen with low enough ESR to meet the output voltage
ripple and transient specifications. The circuit shown in
Figure 1 can be configured for operation up to an input
voltage of 28V (limited by the external MOSFETs).
R
SENSE
Selection For Output Current
R
SENSE
is chosen based on the required output current.
The LTC1736 current comparator has a maximum thresh-
old of 75mV/R
SENSE
and an input common mode range of
SGND to 1.1(INTV
CC
). The current comparator threshold
sets the peak of the inductor current, yielding a maximum
average output current I
MAX
equal to the peak value less
half the peak-to-peak ripple current,
∆
I
L
.
Allowing a margin for variations in the LTC1736 and
external component values yields:
