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3

LTC1736

ELECTRICAL CHARACTERISTICS

The 

 denotes specifications which apply over the full operating

temperature range, otherwise specifications are at T

A

 = 25

°

C. V

IN

 = 15V, V

RUN/SS

 = 5V unless otherwise noted.

Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.

Note 2: T

J

 is calculated from the ambient temperature T

A

 and power

dissipation P

D

 according to the following formulas:

   LTC1736CG, LTC1736IG: T

J

 = T

A

 + (P

D

 • 110

°

C/W)

Note 3: The LTC1736 is tested in a feedback loop that servos V

FB

 to the

balance point for the error amplifier (V

ITH 

= 1.2V).

Note 4: Dynamic supply current is higher due to the gate charge being
delivered at the switching frequency. See Applications Information.

Note 5: Oscillator frequency is tested by measuring the C

OSC

 charge

current (I

OSC

) and applying the formula:

Note 6: With all five VID inputs floating (or tied to VIDV

CC

) the VIDV

CC

current is typically < 1

µ

A. However, the VIDV

CC

 current will rise and be

approximately equal to the number of grounded VID input pins times
(VIDV

CC

 – 0.6V)/40k. (See the Applications Information section for more

detail.)

Note 7: Each built-in pull-up resistor attached to the VID inputs also has a
series diode to allow input voltages higher than the VIDV

CC

 supply without

damage or clamping. (See the Applications Information section for more
detail.)

Note 8: The minimum on-time condition corresponds to the on inductor
peak-to-peak ripple current 

40% of I

MAX

 (see minimum on-time

considerations in the Applications Information section).

Note 9: Rise and fall times are measured using 10% and 90% levels. Delay
times are measured using 50% levels.

f

C

pF

I

I

OSC

OSC

CHG

DIS

=

+

+







8 477 10

11

1

1

11

1

.

(

)

(

)

SYMBOL

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

BG Transition Time:

(Note 9)

BG t

r

  Rise Time

C

LOAD

 = 3300pF

50

90

ns

BG t

f

  Fall Time

C

LOAD

 = 3300pF

40

80

ns

TG/BG T1D

Top Gate Off to Synchronous

C

LOAD

 = 3300pF Each Driver

100

ns

Gate-On Delay Time

TG/BG T2D

Synchronous Gate Off to Top

C

LOAD

 = 3300pF Each Driver

70

ns

Gate-On Delay Time

Internal V

CC

 Regulator

V

INTVCC

Internal V

CC

 Voltage

6V < V

IN

 < 30V, V

EXTVCC

 = 4V

5.0

5.2

5.4

V

V

LDO(INT)

Internal V

CC 

Load Regulation

I

CC

 = 0mA to 20mA, V

EXTVCC

 = 4V

0.2

1

%

V

LDO(EXT)

EXTV

CC

 Drop Voltage

I

CC

 = 20mA, V

EXTVCC

 = 5V

130

200

mV

V

EXTVCC

EXTV

CC

 Switchover Voltage

I

CC

 = 20mA, EXTV

CC

 Ramping Positive

4.5

4.7

V

V

EXTVCC(HYS)

EXTV

CC

 Hysteresis

0.2

V

Oscillator

f

OSC

Oscillator Frequency

(Note 5), C

OSC 

= 43pF

265

300

335

kHz

f

H

/f

OSC

Maximum Sync Frequency Ratio

1.3

f

FCB(SYNC)

FCB Pin Threshold For Sync

Ramping Negative

0.9

1.2

V

PGOOD Output

V

PGL

PGOOD Voltage Low

I

PGOOD 

= 2mA

110

200

mV

I

PGOOD

PGOOD Leakage Current

V

PGOOD

 = 5V

±

1

µ

A

V

PG

PGOOD Trip Level

V

OSENSE

 with Respect to Set Output Voltage

   V

OSENSE

 Ramping Negative

– 6.0

– 7.5

– 9.5

%

   V

OSENSE

 Ramping Positive

   6.0

  7.5

  9.5

%

VID Control

VIDV

CC

VID Operating Supply Voltage

2.7

5.5

V

I

VIDVCC

VID Supply Current

(Note 6) VIDV

CC

 = 3.3V

0.01

5

µ

A

R

VFB/VOSENSE

Resistance Between V

OSENSE

 and V

FB

10

k

R

RATIO

Resistor Ratio Accuracy

Programmed from 0.925V to 2.00V

±

0.05

%

R

PULL-UP

VID0 to VID4 Pull-Up Resistance

(Note 7) V

DIODE

 = 0.6V

40

k

V

IDT

VID Input Voltage Threshold

0.4

1.0

1.6

V

I

VIDLEAK

VID Input Leakage Current

(Note 7) VIDV

CC

 < VID < 7V

0.01

±

1

µ

A

V

PULL-UP

VID Pull-Up Voltage

VIDV

CC

 = 3.3V

2.8

V

VIDV

CC

 = 5V

4.5

V

Summary of Contents for LTC1736

Page 1: ...allowing maximum flexibility inoptimizingefficiency Theoutputvoltageismonitoredby a power good window comparator that indicates when the output is within 7 5 of its programmed value Protection feature...

Page 2: ...TA 25 C VIN 15V VRUN SS 5V unless otherwise noted SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS Main Control Loop VOSENSE Output Voltage Set Accuracy Note 3 See Table 1 1 VLINEREG Reference Voltage L...

Page 3: ...n Note 9 Rise and fall times are measured using 10 and 90 levels Delay times are measured using 50 levels f C pF I I OSC OSC CHG DIS 8 477 10 11 1 1 11 1 SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS...

Page 4: ...30 95 EXTVCC OPEN VOUT 1 6V FIGURE 1 IOUT 5A IOUT 0 5A LOAD CURRENT A 0 NORMALIZED V OUT 0 2 0 1 8 1736 G05 0 3 0 4 2 4 6 12 10 0 FCB 0V VIN 15V FIGURE 1 Load Regulation LOAD CURRENT A 0 0 I TH VOLTA...

Page 5: ...0 CURRENT SENSE THRESHOLD mV 30 50 70 90 2 1736 G13 10 10 20 40 60 80 0 20 30 0 5 1 1 5 2 5 VRUN SS V 0 0 V ITH V 0 5 1 0 1 5 2 0 2 5 1 2 3 4 1736 G15 5 6 VOSENSE 0 7V VITH vs VRUN SS TEMPERATURE C 4...

Page 6: ...V IL 5A DIV 1736 G22 5ms DIV VIN 15V VOUT 1 6V RLOAD 0 16 VOUT RIPPLE Synchronized VOUT 10mV DIV IL 5A DIV 1736 G23 10 s DIV EXT SYNC f fO VIN 15V VOUT 1 6V VOUT RIPPLE Burst Mode Operation VOUT 20mV...

Page 7: ...VFBis0 8Vwhen the output is in regulation This pin can be bypassed to SGND with 50pF to 100pF VOSENSE Pin 10 Receives the remotely sensed feedback voltage from the output VID0 to VID4 Pins 11 to 15 Di...

Page 8: ...t com parator I2 or the beginning of the next cycle The top MOSFET driver is powered from a floating bootstrap capacitor CB This capacitor is normally re chargedfromINTVCC throughanexternalSchottkydio...

Page 9: ...is resumed Burst Mode operation is disabled by comparator F when the FCB pin is brought below 0 8V This forces continuous operation and can assist second ary winding regulation When the FCB pin is dri...

Page 10: ...ever lower frequency operation re quires more inductance for a given amount of ripple current TheLTC1736usesaconstant frequencyarchitecturewith the frequency determined by an external oscillator capac...

Page 11: ...uehasadirecteffectonripplecurrent The inductor ripple current IL decreases with higher induc tance or frequency and increases with higher VIN or VOUT I f L V V V L OUT OUT IN 1 1 Accepting larger valu...

Page 12: ...the MOSFETs as well most of the logic level MOSFETs are limited to 30V or less SelectioncriteriaforthepowerMOSFETsincludethe ON resistance RDS ON reverse transfer capacitance CRSS input voltage and ma...

Page 13: ...te and slow down the response The minimum capacitance to assure the inductors energy is adequately absorbed is C L I V V OUT OUT 2 2 where I is the change in load current Largerdiodescanresultinadditi...

Page 14: ...a tions of different capacitor types have proven to be a very cost effective solution Remember also to include high frequency decoupling capacitors They should be placed as close as possible to the po...

Page 15: ...to the LTC1735 data sheet for details The charge pump has the advantage of simple magnetics Output Voltage Programming Theoutputvoltageisdigitallysettolevelsbetween0 925V and 2 00V using the voltage i...

Page 16: ...cross the gate source of the MOSFET This enhances the MOSFET and turns on the topside switch The switch node voltage SW rises to VIN and the BOOST pin rises to VIN INTVCC The value of the boost capaci...

Page 17: ...Latchoff The RUN SS pin also provides the ability to shut off the controller and latchoff when an overcurrent condition is detected The RUN SS capacitor CSS is used initially to turn on and limit the...

Page 18: ...ple current is determined by the minimum on time tON MIN of the LTC1736 less than 200ns the input voltage and inductor value IL SC tON MIN VIN L The resulting short circuit current is I mV R I SC SENS...

Page 19: ...forced In this case the top and bottom MOSFETs continue to be driven synchronously regardless of the load on the main output Burst Mode operation is disabled and current reversal is allowed in the ind...

Page 20: ...Efficiency 100 L1 L2 L3 APPLICATIO S I FOR ATIO W U U U where L1 L2 etc are the individual losses as a percent age of input power Although all dissipative elements in the circuit produce losses four m...

Page 21: ...behavior but also provides a DC coupled and AC filtered closed loop response test point The DC step rise time and settling at this test point truly reflects the closed loop response Assuming a pre dom...

Page 22: ...oad This offset is limited to 30mV at the input of the error amplifier The resulting change in output voltage is the product of input offset and the feedback voltage divider ratio Figure 6 shows a CPU...

Page 23: ...fset ITH OUT DC L ITH ITH 2 At full load current V A A V A V V ITH MAX P P 15 5 2 0 084 0 3 1 77 At minimum load current V A A V A V V ITH MIN P P 0 2 2 2 0 084 0 3 0 40 In this circuit VITH changes f...

Page 24: ...siderably with active voltage positioning Refer to Design Solutions 10 for more information about active voltage positioning Automotive Considerations Plugging into the Cigarette Lighter As battery po...

Page 25: ...paral leled Choosing Fairchild FDS6680A MOSFETs yields a parallel RDS ON of 0 0065 The total power dissipaton for both bottom MOSFETs again assuming T 50 C is P V V V A mW SYNC 22 1 6 22 12 1 1 0 0065...

Page 26: ...NSE and SENSE should be as close as possibletotheLTC1736 Ensureaccuratecurrentsens ing with kelvin connections as shown in Figure 11 Series resistance can be added to the SENSE lines to increase noise...

Page 27: ...onofitscircuitsasdescribedhereinwillnotinfringeonexistingpatentrights G24 SSOP 1098 0 13 0 22 0 005 0 009 0 8 0 55 0 95 0 022 0 037 5 20 5 38 0 205 0 212 7 65 7 90 0 301 0 311 1 2 3 4 5 6 7 8 9 10 11...

Page 28: ...ep Down Controllers 100 DC Burst Mode Operation VIN 20V LTC1149 High Efficiency Synchronous Step Down Controller 100 DC Std Threshold MOSFETs VIN 48V LTC1159 High Efficiency Synchronous Step Down Cont...

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