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dc1974f
DEMO MANUAL DC1974
XILINX KC705 BASED EVALUATION SYSTEM
The demonstration system for the LTC2124 family consists
of the DC1974, a Xilinx KC705 FPGA evaluation board, a
DC2159 USB communication board and a host PC running
the PScope software.
Complete systems that ship from Linear Technology will
have the KC705 board configured to automatically load
the default subclass 0 FPGA image from the onboard
configuration EEPROM. The procedure for bringing up
the system is as follows:
1) If the boards were obtained separately, assemble them
as shown in Figure 5 (FMC connectors are fragile, make
sure they are properly aligned before seating.)
2) Connect power supply to the KC705 board and turn on
the power switch. If the assembled system was obtained
from Linear Technology, the subclass 0 image will load
automatically from the onboard configuration memory.
3) Boards not obtained from Linear Technology will need
to be configured as described in the Alternate FPGA
Configuration section below.
4) Apply power, encode clock and analog input signals to
the DC1974 board.
5) Verify that PScope software is installed. Connect DC2159
to the host PC with a USB-mini cable. Driver installation
will start automatically and PScope will recognize the
DC1974 when installation finishes.
NOTE:
Power must be applied to the KC705 board when
the USB cable is connected or the driver installation will
not complete properly.
ALTERNATE FPGA CONFIGURATION
KC705 boards not obtained from Linear Technology will
need to be configured via JTAG. FPGA images are located
in the PScope installation directory in the FPGA_images
folder. Connect a USB micro cable to the JTAG USB con-
nector on the KC705 board and use a Xilinx tool such as
Impact to load the Subclass 0, 2 lane bitfile. Once the
FPGA is configured, remove the USB cable and exit the
software. (The onboard JTAG adapter and the DC2159
USB communication board use the same USB controller
and they may interfere with one another.)
APPENDIX A
