Linear Technology DC1974 Series Demo Manual Download Page 12

12

dc1974f

DEMO MANUAL DC1974

SCHEMATIC DIAGRAM

5

5

4

4

3

3

2

2

1

1

D

D

C

C

B

B

A

A

ASSY

LTC2123IUK-14

U1

LTC2122IUK-14

*

250 170

Msps

-A

LTC2124IUK-14

310

GND

V+

4V - 6V

ALL CAPACITORS ARE IN MICROFARADS, 0402.

NOTES:  UNLESS OTHERWISE SPECIFIED

2.  INSTALL SHUNTS AS SHOWN.

1.  ALL RESISTORS ARE IN OHMS, 0402.

-Bit

14 14

14

-B -C

C42 - C49 1000pF

SYNC

0

1

CML* CONNECTIONS ARE 50 OHMS

3.  R18 IS OPTIONAL AT THE FINAL VERSION.

SENSE

AINB- AINB+

AINA-

AINA+

VCM

CLK-

CLK+

V+

+3.3V

V+

VDD

VDD

VDD

VDD

VDD

VDD

VDD

OVDD

OVDD

VDD

OVDD

OVDD

VDD

VDD

VDD

+3.3V

VDD

+3.3V

+3.3V

CMLB1_N

CMLB1_P

SYNC_N

SYNC_P

CMLB2_N

CMLB2_P

CMLA2_P

CMLA1_N

CMLA1_P

CMLA2_N

OF+ OF-

CS SCK SDI SDO

FPGA_CLK_P FPGA_CLK_N

REVISION HISTORY

DESCRIPTION

DATE

APPROVED

ECO

REV

CLARENCE M.

PRODUCTION

3

07-31-14

__

REVISION HISTORY

DESCRIPTION

DATE

APPROVED

ECO

REV

CLARENCE M.

PRODUCTION

3

07-31-14

__

REVISION HISTORY

DESCRIPTION

DATE

APPROVED

ECO

REV

CLARENCE M.

PRODUCTION

3

07-31-14

__

SIZE

DATE:

IC NO.

REV.

SHEET

OF

TITLE:

APPROVALS

PCB DES.

APP ENG.

TECHNOLOGY

Fax: (408)434-0507

Milpitas, CA 95035 Phone: (408)432-1900

1630 McCarthy Blvd.

LTC Confidential-For Customer Use Only

CUSTOMER NOTICE

LINEAR TECHNOLOGY HAS MADE A BEST EFFORT TO DESIGN A CIRCUIT THAT MEETS CUSTOMER-SUPPLIED SPECIFICATIONS; HOWEVER, IT REMAINS THE CUSTOMER'S RESPONSIBILITY TO VERIFY PROPER AND RELIABLE OPERATION IN THE ACTUAL APPLICATION.  COMPONENT SUBSTITUTION AND PRINTED CIRCUIT BOARD LAYOUT MAY SIGNIFICANTLY AFFECT CIRCUIT PERFORMANCE OR RELIABILITY.  CONTACT LINEAR TECHNOLOGY APPLICATIONS ENGINEERING FOR ASSISTANCE.

THIS CIRCUIT IS PROPRIETARY TO LINEAR TECHNOLOGY AND

SCHEMATIC

SUPPLIED FOR USE WITH LINEAR TECHNOLOGY PARTS.

SCALE = NONE

www.linear.com

3

DEMO CIRCUIT 1974A

Thursday, July 31, 2014

1

2

N/A

LTC212XIUK FAMILY

KIM T.

CLARENCE M.

DUAL 14-BIT HIGH SPEED ADC WITH JESD204B SERIAL OUTPUTS

SIZE

DATE:

IC NO.

REV.

SHEET

OF

TITLE:

APPROVALS

PCB DES.

APP ENG.

TECHNOLOGY

Fax: (408)434-0507

Milpitas, CA 95035 Phone: (408)432-1900

1630 McCarthy Blvd.

LTC Confidential-For Customer Use Only

CUSTOMER NOTICE

LINEAR TECHNOLOGY HAS MADE A BEST EFFORT TO DESIGN A CIRCUIT THAT MEETS CUSTOMER-SUPPLIED SPECIFICATIONS; HOWEVER, IT REMAINS THE CUSTOMER'S RESPONSIBILITY TO VERIFY PROPER AND RELIABLE OPERATION IN THE ACTUAL APPLICATION.  COMPONENT SUBSTITUTION AND PRINTED CIRCUIT BOARD LAYOUT MAY SIGNIFICANTLY AFFECT CIRCUIT PERFORMANCE OR RELIABILITY.  CONTACT LINEAR TECHNOLOGY APPLICATIONS ENGINEERING FOR ASSISTANCE.

THIS CIRCUIT IS PROPRIETARY TO LINEAR TECHNOLOGY AND

SCHEMATIC

SUPPLIED FOR USE WITH LINEAR TECHNOLOGY PARTS.

SCALE = NONE

www.linear.com

3

DEMO CIRCUIT 1974A

Thursday, July 31, 2014

1

2

N/A

LTC212XIUK FAMILY

KIM T.

CLARENCE M.

DUAL 14-BIT HIGH SPEED ADC WITH JESD204B SERIAL OUTPUTS

SIZE

DATE:

IC NO.

REV.

SHEET

OF

TITLE:

APPROVALS

PCB DES.

APP ENG.

TECHNOLOGY

Fax: (408)434-0507

Milpitas, CA 95035 Phone: (408)432-1900

1630 McCarthy Blvd.

LTC Confidential-For Customer Use Only

CUSTOMER NOTICE

LINEAR TECHNOLOGY HAS MADE A BEST EFFORT TO DESIGN A CIRCUIT THAT MEETS CUSTOMER-SUPPLIED SPECIFICATIONS; HOWEVER, IT REMAINS THE CUSTOMER'S RESPONSIBILITY TO VERIFY PROPER AND RELIABLE OPERATION IN THE ACTUAL APPLICATION.  COMPONENT SUBSTITUTION AND PRINTED CIRCUIT BOARD LAYOUT MAY SIGNIFICANTLY AFFECT CIRCUIT PERFORMANCE OR RELIABILITY.  CONTACT LINEAR TECHNOLOGY APPLICATIONS ENGINEERING FOR ASSISTANCE.

THIS CIRCUIT IS PROPRIETARY TO LINEAR TECHNOLOGY AND

SCHEMATIC

SUPPLIED FOR USE WITH LINEAR TECHNOLOGY PARTS.

SCALE = NONE

www.linear.com

3

DEMO CIRCUIT 1974A

Thursday, July 31, 2014

1

2

N/A

LTC212XIUK FAMILY

KIM T.

CLARENCE M.

DUAL 14-BIT HIGH SPEED ADC WITH JESD204B SERIAL OUTPUTS

J9

FPGA_CLK_N

SMA

J9

FPGA_CLK_N

SMA

J5

ADC_SYS_REF_N

SMA

J5

ADC_SYS_REF_N

SMA

R46

0

R46

0

R22 OPT

R22 OPT

R12

0

R12

0

R1 3.01k

R1 3.01k

L1

0 Ohm RES

1206

L1

0 Ohm RES

1206

C50 0.01uFC500.01uF

E3

SENSE

E3

SENSE

C5 2.2uF 0603

C5 2.2uF 0603

E4

1.8V OUT

E4

1.8V OUT

R48 OPT

R48 OPT

R67 100 0201

R67 100 0201

R29 20

R29 20

J10

FPGA_CLK_P

SMA

J10

FPGA_CLK_P

SMA

J6

ADC_SYS_REF_P

SMA

J6

ADC_SYS_REF_P

SMA

R25 1k

R25 1k

R44

0

R44

0

R39 0

R39 0

R40 0

R40 0

R41 100

R41 100

T3

MABA-007159-000000

T3

MABA-007159-000000

5

4

3

1

2

R47 4.99

R47 4.99

R13

0

R13

0

R66 100 0201

R66 100 0201

R20 OPT

R20 OPT

R10 45.3

R10 45.3

C11 2.2uF 0603

C11 2.2uF 0603

R14 100

R14 100

R27 49.9

R27 49.9

R54 OPT

R54 OPT

T1

MABA-007159-000000

T1

MABA-007159-000000

5

4

3

1

2

R64 4.99

R64 4.99

R50 OPT

R50 OPT

E1E1

C14 0.1uF

C14 0.1uF

R28 49.9

R28 49.9

C24 0.1uF

C24 0.1uF

R7 45.3

R7 45.3

C34 0.01uFC340.01uF

R49 OPT

R49 OPT

C7 10uF 0805

C7 10uF 0805

C26 2.2uF 0603

C26 2.2uF 0603

U1

*

QFN48UK-7X7

U1

*

QFN48UK-7X7

VDD

1

GND

2

AINA+

3

AINA-

4

SENSE

5

VREF

6

VCM

7

GND

8

AINB-

9

AINB+

10

GND

11

VDD

12

VDD

13

GND

14

DEVCLK-

15

16

GND

17

SYS

REF

_P

18

SYS

REF

_N

19

GND

20

SYNC_P

21

SYNC_N

22

VDD

23

VDD

24

OVDD

25

OVDD

26

CMLB2_N

27

CMLB2_P

28

CMLB1_N

29

CMLB1_P

30

CMLA1_N

31

CMLA1_P

32

CMLA2_N

33

CMLA2_P

34

OVDD

35

OVDD

36

VDD

37

VDD

38

DNC

39

DNC

40

OFN-

41

OFN+

42

SDO

43

SDI

44

SCK

45

CS

46

GND

47

VDD

48

GND

49

L2

33 Ohm FB

1206

L2

33 Ohm FB

1206

T2

MABA-007159-000000

T2

MABA-007159-000000

5

4

3

1

2

C6 0.01uF

C6 0.01uF

C35 0.01uFC350.01uF

C4 47uF 1210

C4 47uF 1210

C51 0.01uFC510.01uF

U3

LT1763CDE-3.3

U3

LT1763CDE-3.3

OUT

2

OUT

3

EP

13

SHDN

8

NC

9

GND

7

IN

10

IN

11

SENSE

5

NC

4

NC

1

NC

12

BYP

6

C32 0.1uF

C32 0.1uF

R16

0

R16

0

R30 300

R30 300

J2

AINB

SMA

J2

AINB

SMA

C15 0.1uF

C15 0.1uF

C53 0.1uF

C53 0.1uF

R56 100

R56 100

C17 0.1uF

C17 0.1uF

L3 OPT

1206

L3 OPT

1206

C19 0.1uF

C19 0.1uF

C13 0.1uF

C13 0.1uF

C25

2.2uF

0603

C25

2.2uF

0603

C16 0.1uF

C16 0.1uF

R18 0

[3]

R18 0

[3]

C18 0.1uF

C18 0.1uF

R21 OPT

R21 OPT

R60 OPT

R60 OPT

C27

0.1uF

C27

0.1uF

R2 10k

R2 10k

C33 0.01uFC330.01uF

J1

AINA

SMA

J1

AINA

SMA

R63 4.99

R63 4.99

U9

LTC6957IDD-2

U9

LTC6957IDD-2

GND

5

IN-

4

IN+

3

V+

2

FILTA

1

OUT1-

10

OUT2-

9

OUT2+

8

SD2

7

FILTB

6

OUT1+

11

SD1

12

EP

13

R45

0

R45

0

C23 0.1uFC230.1uF

+

C3 100uF 10V 6032

+

C3 100uF 10V 6032

R6 45.3

R6 45.3

C52

0.01uF

C52

0.01uF

R24 1k

R24 1k

R4 182K

R4 182K

GND

VCC

U7

NC7WZ14P6X

GND

VCC

U7

NC7WZ14P6X

1

6

4

3

5

2

J4

SMA

J4

SMA

C10 0.1uF

C10 0.1uF

R11 45.3

R11 45.3

C31 0.1uF

C31 0.1uF

JP2JP2

1

3 2

C30

0.1uF

C30

0.1uF

R15

0

R15

0

C2 1uF

C2 1uF

C21 0.1uF

C21 0.1uF

R5 1k

R5 1k

R42 OPT

R42 OPT

R26 20

R26 20

C28

0.1uF

C28

0.1uF

R23 OPT

R23 OPT

R62 4.99

R62 4.99

E2E2

R9 24.9

R9 24.9

R8 24.9

R8 24.9

R43 OPT

R43 OPT

R17 100

R17 100

R19 OPT

R19 OPT

C20 0.1uF

C20 0.1uF

C1 1uF

C1 1uF

C12 0.1uF

C12 0.1uF

R65 4.99

R65 4.99

R61 100

R61 100

R55 OPT

R55 OPT

R52 OPT

R52 OPT

R31 300

R31 300

C22 0.1uFC220.1uF

R53 OPT

R53 OPT

LT3080EDD

U2

LT3080EDD

U2

OUT

1

OUT

2

OUT

3

SET

4

VCTRL

5

NC

6

IN

7

IN

8

EP

9

J3

DEVCLK-

SMA

J3

DEVCLK-

SMA

C29 0.1uF

C29 0.1uF

R51 OPT

R51 OPT

Summary of Contents for DC1974 Series

Page 1: ...proper input networks for dif ferent input frequencies Design files for this circuit board are available at http www linear com demo DC1974 DC1974 VARIANTS ADC PART NUMBER RESOLUTION Bit MAXIMUM SAMP...

Page 2: ...ation with the host computer Follow the instructions in Appendix A for the Xilinx KC705 based system Verilog codemaybedownloadedfromtherespectiveADClanding page www linear com LTC2123 CHANNEL 1 SINGLE...

Page 3: ...or testing purposes only In the default configuration these SMAs are not used J9 and J10 FPGA_CLK This is an optional clock input port for the FPGA It is used for testing purposes only In the default...

Page 4: ...he DC1974 is single ended there is a transformer on the board that translates the single ended signal to a differential signal to drive the ADC ANALOG INPUT NETWORK In almost all cases off board filte...

Page 5: ...configure PScope Underthe Configure menu goto ADCConfiguration Check the Config Manually box and use the following configuration options shown in Figure 2 Manual Configuration settings Bits 14 Alignm...

Page 6: ...l to the device clock or device clock twice the sample rate n Off Default DEVCLK is equal to the sample rate n On DEVCLK is twice the sample rate Overflow Enables or disables the overflow bit in the o...

Page 7: ...riods to trigger the alert in subclass 1 Valid values are 1 to 8 Alert Mode Subclass 1 Only Enables or disables the alert mode n Disabled Default Alert mode is disabled n Enabled Alert mode is enabled...

Page 8: ...chnology will need to be configured as described in the Alternate FPGA Configuration section below 4 Apply power encode clock and analog input signals to the DC1974 board 5 VerifythatPScopesoftwareisi...

Page 9: ...CONNECT DC2159 TO PC 1 ASSEMBLE BOARDS 4 POWER UP DC1974 TURN ON CLOCK AND ANALOG INPUTS 3 CONFIGURE FPGA VIA JTAG IF NECESSARY THEN REMOVE USB CABLE 2 POWER UP KC705 dc1974 F05 Figure 5 KC705 Based D...

Page 10: ...16 1 L2 IND FERRITE BEAD 33 1206 MURATA BLM31PG330SN1L 17 0 L3 RES 1206 OPT 18 2 R1 R59 RES CHIP 3 01k 1 16W 1 0402 VISHAY CRCW04023K01FKED 19 1 R2 RES CHIP 10k 1 16W 1 0402 VISHAY CRCW040210K0FKED 20...

Page 11: ...TALL 40 0 MH1 MH2 STAND OFF ALUM M3 THREAD 5 0 HEX 4 40X1 KEYSTONE 24438 DO NOT INSTALL 41 2 STENCILS STENCILS TOP BOTTOM STENCIL DC1974A 3 DC1974A A Required Circuit Components 1 1 DC1974A GENERAL BO...

Page 12: ...NTACT LINEAR TECHNOLOGY APPLICATIONS ENGINEERING FOR ASSISTANCE THIS CIRCUIT IS PROPRIETARY TO LINEAR TECHNOLOGY AND SCHEMATIC SUPPLIED FOR USE WITH LINEAR TECHNOLOGY PARTS SCALE NONE www linear com 3...

Page 13: ...E25 GND E26 HB09_P E27 HB09_N E28 GND E29 HB13_P E30 HB13_N E31 GND E32 HB21_P E33 HB21_N E34 GND E35 HB20_P E36 HB20_N E37 GND E38 VADJ E39 GND E40 SCK SCK J13A SEAM 10X40PIN J13A SEAM 10X40PIN GND...

Page 14: ...RY INCLUDING ANY WARRANTY OF MERCHANTABILITY OR FITNESS FOR ANY PARTICULAR PURPOSE EXCEPT TO THE EXTENT OF THIS INDEMNITY NEITHER PARTY SHALL BE LIABLE TO THE OTHER FOR ANY INDIRECT SPECIAL INCIDENTAL...

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