LTM4636
21
4636f
applicaTions inForMaTion
As a practical matter, it should be clear to the reader that
no individual or sub-group of the four thermal resistance
parameters defined by JESD51-12 or provided in the Pin
Configuration section replicates or conveys normal op-
erating conditions of a µModule regulator. For example,
in normal board-mounted applications, never does 100%
of the device’s total power loss (heat) thermally con-
duct exclusively through the top or exclusively through
the bottom of the µModule package—as the standard
defines for
θ
JCtop
and
θ
JCbottom
, respectively. In practice,
power loss is thermally dissipated in both directions away
from the package—granted, in the absence of a heat sink
and airflow, a majority of the heat flow is into the board.
Within the LTM4636, be aware there are multiple power
devices and components dissipating power, with a con-
sequence that the thermal resistances relative to different
junctions of components or die are not exactly linear with
respect to total package power loss. To reconcile this
complication without sacrificing modeling simplicity—but
also not ignoring practical realities—an approach has been
taken using FEA software modeling along with laboratory
testing in a controlled-environment chamber to reason-
ably define and correlate the thermal resistance values
supplied in this data sheet: (1) Initially, FEA software is
used to accurately build the mechanical geometry of the
LTM4636 and the specified PCB with all of the correct
material coefficients along with accurate power loss source
definitions; (2) this model simulates a software-defined
JEDEC environment consistent with JESD51-12 to predict
power loss heat flow and temperature readings at different
interfaces that enable the calculation of the JEDEC-defined
thermal resistance values; (3) the model and FEA software
is used to evaluate the LTM4636 with heat sink and airflow;
(4) having solved for and analyzed these thermal resis-
tance values and simulated various operating conditions
in the software model, a thorough laboratory evaluation
replicates the simulated conditions with thermocouples
within a controlled-environment chamber while operat-
ing the device at the same power loss as that which was
simulated. The outcome of this process and due diligence
yields the set of derating curves shown in this data sheet.
The power loss curves in Figures 10 to 12 can be used
in coordination with the load current derating curves
in Figures 13 to 18 for calculating an approximate
θ
JA
thermal resistance for the LTM4636 with various airflow
conditions. The power loss curves are taken at room
temperature and can be increased with a multiplicative
factor according to the junction temperature, which is
~1.4 for 120°C. The derating curves are plotted with
the output current starting at 40A and the ambient
temperature increased. The output voltages are 1V,
2.5V and 3.3V. These are chosen to include the lower,
middle and higher output voltage ranges for correlating
the thermal resistance. Thermal models are derived
from several temperature measurements in a controlled
temperature chamber along with thermal modeling
analysis. The junction temperatures are monitored while
ambient temperature is increased with and without airflow.
The power loss increase with ambient temperature change
is factored into the derating curves. The junctions are
maintained at ~125°C maximum while lowering output
current or power with increasing ambient temperature.
The decreased output current will decrease the internal
module loss as ambient temperature is increased.
The monitored junction temperature of 125°C minus
the ambient operating temperature specifies how much
module temperature rise can be allowed. As an example, in
Figure 14 the load current is derated to ~30A at ~94°C
with no air flow and the power loss for the 12V to 1.0V
at 30A output is about 4.2W. The 4.2W loss is calculated
with the ~3W room temperature loss from the 12V to
1.0V power loss curve at 30A, and the 1.4 multiplying
factor at 125°C junction. If the 94°C ambient temperature
is subtracted from the 125°C junction temperature, then
the difference of 31°C divided by 4.2W equals a 7.4°C/W
θ
JA
thermal resistance. Table 2 specifies a 7.2°C/W value
which is very close. Tables 2, 3, and 4 provide equivalent
thermal resistances for 1V, 1.5V and 3.3V outputs with
and without airflow and heat sinking. The derived thermal
resistances in Tables 2 thru 4 for the various conditions
can be multiplied by the calculated power loss as a function
of ambient temperature to derive temperature rise above
