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29
I/O
Description
Remark
I/O General I/O Port
Convertable to input port and output port by a command
In input port mode, readable the terminal condition(H/L) to read command
In output port mode, be able to control the terminal condition(H/L/Hi-Z) to command
I
It selects the mode output 2 state PWM of disc EQ at IO 2,
Enhanced Pull-Up resistor
Pin -
and 2 state PWM of Feed EQ at IO 0, Pin -
.
Active "L"
I
X-TAL selet terminal
Enhanced Pull-Up resistor
It is
°∞
H
°±
on 16.9344MHz, "L" on 33.8688MHz
I
TEST terminal
Enhanced Pull-Up resistor
Normally, it is opened.
I
Test input, Normally, fixed "L"
Analog Input
I/O Test in/output, Normally, fixed "L"
-
Digital GND
I
Clock OSC circuit input for DSP
Analog Input
Normally, fixed "L"
O
Clock oscillating circuit output for DSP
-
Digital VDD
-
System Clock oscillating circuit GND
I
System Clock oscillating circuit input
O
System Clock oscillating circuit output
-
VDD for System Clock OSC
-
VDD for D/A Convertor
O
R-CH Data positive output
-
GND for D/A Convertor
-
D/A Convertor reference voltage
O
L-CH DATA positive output
-
VDD for D/A Convertor
I
TEST terminal
Enhanced Pull-Up resistor
Normally, It is opened.
I
TEST terminal
Enhanced Pull-Up resistor
Normally, It is opened.
I
TEST terminal
Enhanced Pull-Up resistor
Normally, It is opened.
I/O DATA in/output for µ-COM Interface
Schmitt Input
I/O
CMOS Port
I/O
I/O
-
Digital VDD
-
Digital GND
I
Clock Input for µ-COM Interface
Schmitt Input
I
Chip Enable signal input for µ-COM Interface, 0~3 BUS is active in “L” mode
Schmitt Input
I
TEST terminal
Enhanced Pull-Up resistor
Normally, It is opened.
I
Local Test Mode Select terminal
Enhanced Pull-Up resistor
Pin No.
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
Pin Name
IO0
IO1
IO2
IO3
/DMOUT
/CKSE
/DACT
TESIN
TESIO1
VSS
PXI
PXO
VDD
XVSS
XI
XO
XVDD
DVDD
RO
DVSS
DVR
LO
DVDD
TEST1
TEST2
TEST3
BUSO
BUS1
BUS2
BUS3
VDD
VSS
BUCK
/CCE
TEST4
/TSMOD
3
1