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I/O
Description
Remark
-
Digital GND
O
Bit Clock (1.4122MHz) Output
O
Audio data output
O
Digital output
O
Buffer Memory over signal output
When over is" "
H
O
Compensated output
IPF outputs “H” when AOUT output has a symbol
which can’t correct the error in the error correction mode.
O
CRCC Judgement result output of the Subcode Q data
"
"
H is when judgement result is OK
I/O Clock input/output for reading subcode P~W data
Selectable to command bit
-
Digital Power VDD
-
Digital GND
O
Sub Code P~W data output
O
Playback Frame sync signal output
O
Sub code Block sync output
S1 is "
"
H when the subcode sync output
O
Clock (176.4KHz) output for reading Processor status signal
O
Processor status signal output
O
Error correction Frame clock (7.35kHz) output
O
LSI internal signal Monitor port
Be able to monitor the clock for the DSP internal flag or PLL by the µ-COM Command
-
Digital power VDD
I
Test input port
Normally, fixed " "
L
-
2V
REF
(4.2V) for PLL Block
O
VCO Center Frequency shift port
O
Phase differential signal output between EFM and PLCK signal
(Used in x 8 Operation mode)
O
Phase differential signal output between EFM and PLCK signal
O
Select to Command Bit TMPS
3 state out
(P2VREF, PVREF, VSS)
O
3 state out
(P2VREF, HiZ, VSS)
I
Inverted input of LPF AMP
Analog input
O
Output of LPF AMP
Analog output
-
V
REF
for PLL Block
I
VCO Center Frequency reference level
Normally, fixed "PVREF"
O
VCO Filter
Analog output
-
Analog GND
27
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
Pin Name
VSS
BCK
AOUT
DOUT
MBOV
IPF
SBOK
CLCK
VDD
VSS
DATA
SFSY
SBSY
SPCK
SPDA
COFS
MONIT
VDD
TESIO0
P2VREF
SPDO
PDOS
PDO
TMAXS
TMAX
LPFN
LPFO
PVREF
VCOREF
VCOF
AVSS
TMAX detecting output
TMAX output
T
T
2
"P2VREF "
T
T
1
"VSS "
T
1
T
T
2
"HIZ "
Pin Description