3. TECHNICAL BRIEF
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Figure 3-2 SI4205 RECEIVER PART
B. Intermediate frequency (IF) and Demodulation
A quadrature image-reject mixer downconvertsthe RF signal to a 100KHz intermediate
frequency (IF) with the RFLO from the frequency synthesizer. The RFLO frequency is
between 1737.8 to 1989.9 MHz, and is internally divided by 2 for GSM 850 and E-GSM 900
modes. The mixer output is amplified with an analog programmable gain amplifier (PGA),
which is controlled with the AGAIN[2:0] bits in register 05h (Figure3-2). The quadrature IF
signal is digitized with high resolution A/D converters (ADCs).
The ADC output is downconverted to baseband with a digital 100KHz quadrature LO signal.
Digital decimation and IIR filters perform channel selection to remove blocking and
reference interference signals. The selectivity setting (CSEL=0) or a low selectivity setting
(CSEL=1). The low selectivity filter has a flatter group channelization filter is in the
baseband chip. After channel selection, the digital output is scaled with a digital PGA, which
is controlled with the DGAIN [5:0] bits in register 05h.
The amplified digital output signal go through with DACs that drive a differential analog
signal onto the RXIP,RXIN,RXQP and RXQN pins to interface to standard analog ADC input
baseband ICs. No special processing is required in the baseband for offset compensation
or extended dynamic range.
Compared to a direct-conversion architecture, the low-IF architecture has a much greater
degree of immunity to dc offsets that can arise from RF local oscillator(RFLO) self-mixing,
2nd order distortion of blockers, and device 1/f noise.
Summary of Contents for B2070
Page 68: ... 67 4 TROUBLE SHOOTING TEST POINT 4 6 LCD Trouble ...
Page 72: ... 71 4 TROUBLE SHOOTING TEST POINT 4 8 Speaker Trouble ...
Page 79: ... 78 4 TROUBLE SHOOTING 4 11 KEY backlight Trouble TEST POINT ...
Page 107: ... 106 8 PCB LAYOUT Figure 8 1 B2070 BOTTOM SIDE PCB LAYOUT ...
Page 108: ... 107 8 PCB LAYOUT Figure 8 1 B2070 TOP SIDE PCB LAYOUT ...
Page 109: ... 108 ...
Page 117: ...10 STAND ALONE TEST 116 Figure 10 2 HW test setting Figure 10 3 Ramping profile ...
Page 121: ... 120 ...
Page 123: ... 122 ...