Lexicon Studio Core2 Service Manual
6-2
Core2 Block Diagram
PCI Bus
DSP
M56301
FPGA
BOOT
ROM
(Dev Only)
FPGA
XCS10
D/A
AK4324
MP100
Effects
Input
Level
Control
CS3310
DBX Type-4
PLL
A/D
AK5383
96K-S/s
24bits
CH 1
CH 2
.
.
.
DBX Type-4
Analog In
CH 1
Analog Out
CH 2
.
.
.
AD_CH12
AD_CH34
DA_CH12 - SDATA
DA_CH34
DA_CH56
DA_CH78
SampleClk
RefClk
MasterClk
DSP
BOOT
ROM
AD_CH12
SDATA
L
R
L
R
ADAT
or
SPDIF
SPDIF RCA IN
SPDIF RCA OUT
ADAT IN
ADAT OUT
Summary of Contents for CORE2
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