22/16
10K
10K
+5VD
+5VD
1M
DESCRIPTION
REV
CHECKER
DRAFTER
AUTH.
Q.C.
REVISIONS
1
SIZE
OF
32
A
B
C
D
1
2
3
4
5
6
7
8
4
5
6
7
8
A
B
C
D
NUMBER
CODE
Q.C.
ISSUED
DATE
APPROVALS
CONTRACT
NO.
SHEET
FILE NAME
B
DRAWN
CHECKED
TITLE
exicon
REV
3 OAK PARK
BEDFORD, MA 01730
+5VD
10
33PF
10K
256FS_OUT
MRST/
M_A
M_AA
M_AB
M_AC
98
M_AD
M_AE
M_B
M_C
M_D
M_E
M_F
M_G
M_H
M_J
M_K
M_L
M_MC
M_N
51
M_P
52
M_Q
M_R
M_S
M_SDIN0
M_SDOUT0
M_T
M_W
M_WC/
M_X
M_Y
M_Z
M_ZCLK
M_ZIORQ/
M_ZM1/
M_ZMREQ/
M_ZRD/
M_ZWR/
PLL_TSTCP
PLL_TSTVCO
PLL_VDD
PLL_VSS
XA_0
XA_1
XA_2
XA_3
XA_4
XA_5
XA_6
XA_7
XA_8
XCAS0/
XD_0
XD_1
XD_2
XD_3
XRAS/
XTI
XTO
XWE/
ZA0
ZA1
ZA10
ZA11
ZA12
ZA13
ZA14
ZA15
ZA2
ZA3
ZA4
ZA5
ZA6
ZA7
ZA8
ZA9
ZD0
ZD1
ZD2
ZD3
ZD4
ZD5
ZD6
ZD7
50
ZDEC0/
ZINT/
ZRST/
ZWAIT/
LEXICHIP-3B
GND
GND
GND
GND
GND
GND
VCC
VCC
VCC
VCC
VCC
VCC
(ADDIS, FSQOUT/)
(CLK_IN)
(MC_IN, MC_OUT)
(SDIN0, PLL_TSTCLK)
(ZCLK_IN, ZCLK_OUT)
(PIOA_4, XA_9)
(PIOA_0, XD_4)
(PIOA_1, XD_5)
(PIOA_2, XD_6)
(PIOA_3, XD_7)
(ADCMP_0,ADMX_0,XD_8)
(ADCMP_1,ADMX_1,XD_9)
(ADCMP_2,ADMX_2,XD_10)
(ADCMP_3,ADMX_3,XD_11)
(PIOB_2, SDIN1, ZREG3/)
(PIOB_3, DO_CBL, XA_10)
(PIOB_5, DIG_OUT, ZREG1/)
(PIOB_7, DO_C, DO_U, SDOUT1, ZREG0/)
(PIOB_6,RP_1, ZBK_1, PCLK1)
(PIOA_6, ZBK_2, RP_2, ZREG2/)
(PIOA_7, FS256INB, ZBK_3, ZDEC2/)
(PIOB_1, SFR1, FS256INB)
(PIOB_0, SCLK1, ADCMP_3, FS128OUT)
(SCLK0, FS64OUT)
(SDOUT0, PLL_TSTOUT)
(WCIN/, WCOUT/)
(RP0, PCLK0, ZBK_0)
(ZDEC1/, SFR0, ADCMP_3)
(MIDI_THRU/, MIDI_OUT/, PLL_SYSCLK)
(MIDI_IN,MCX2_IN, PLL_TSTRN)
(PIOA_5, XCAS1/)
(RP3)
(RP4)
(RP5)
(RP6)
(RP7)
(PIOB_4, DO_U, DO_C, XA_11, 512FSIN)
33PF
11.2896MHZ
.1/25
+5VD
A0
A1
A2
A3
A4
A5
A6
A7
D
0
D1
D10
D11
D12
D13
D14
D2
D3
D4
D5
D6
D7
D9
LCAS
OE
RAS
UCAS
WE
A8
D8
A9
D15
1MX16
70NS
NC
NC
NC
VCC
VCC
VCC
GND
GND
GND
NC
NC
+5VD
10K
+5VD
+5VD
10K
100
.01/50
1N914
12/15/00
2
REVISED PER DCR 001109-00
11/10/00
RWH
12/15/00
JV
CW
JLM
12/27/00
JLM
10/17/00
10/17/00
CW
CAM
10/12/00
1
REVISED PER DCR 001002-00
9/28/00
9/28/00
CAM
9/28/00
JV
CW
R
W
H
8/18/00
CONFIGURATION
RESISTORS
.
SCHEM,MAIN BD,MPX200
8
060-14659
LEXICHIP3
10/4/00
RWH
2
LEX_A2
LEX_A0
LEX_A1
LEX_A2
LEX_A3
LEX_A4
LEX_A5
LEX_A6
LEX_A7
LEX_A8
LEX_A9
LEX_A[9:0]
LEX_A9
LEX_A8
LEX_A7
LEX_A6
LEX_A5
LEX_A4
LEX_A3
LEX_A1
LEX_A0
14659-2
12-27-2000_15:57
66
LEX_FS/
[2/B8,3/C4]
LEX_64FS/
[2/B8,3/C4]
[2/B8]
D/A_DATA
RESET/
[3/B8,4/A6,5/B8]
[2/B8]
LEX_256FS
D4
R107
0
R105
0
R96
0
R102
0
R94
0
R72
0
SERIAL_DATA
[5/A8]
ZA0
ZA[15:0]
[5/D3]
ZA2
ZA1
ZA7
ZA8
ZA9
ZA11
ZA12
ZA13
ZA14
ZA15
ZA10
ZA6
ZA5
ZA4
ZA3
R101
180
R93
1
8
0
R77
1
8
0
[3/C2]
SP_MCLK
R71
1
8
0
R69
1
8
0
R70
1
8
0
MIDI_OUT/_THRU/
[4/D4]
A/D_DATA
[2/A2]
C67
MIDI_IN
[4/D5]
R68
SP_MASTER/
[3/B8]
ZMREQ/
[5/C5]
DE_EMPH/
[2/B8]
PWR_DWN/
[2/B8]
LEX_SDIN1
[3/C2]
ROM_A16
[5/B5]
ROM_A17
[5/B5]
[5/D5]
REG_SEL/
ZD[7:0]
[3/C3,4/B5,5/D3]
ZD7
ZD0
ZD1
ZD2
ZD3
ZD4
ZD5
ZD6
ZD7
ZD6
ZD5
ZD4
ZD3
ZD2
ZD1
ZD0
NC
SPDIF_OUT
[3/D5]
R76
NC
LEX_D3
LEX_D4
LEX_D7
LEX_D6
LEX_D5
LEX_D2
LEX_D1
LEX_D0
LEX_D[7:0]
LEX_D1
LEX_D2
LEX_D4
LEX_D6
LEX_D7
LEX_D5
LEX_D3
LEX_D0
R117
10K
10K
R118
10K
R114
10K
R119
10K
R115
[1/A8]
MUTE/
R73
15
16
17
18
19
20
23
24
25
26
2
3
35
36
38
39
40
4
5
7
8
9
10
34
22
37
42
21
6
1
31
29
14
30
13
27
33
28
41
12
11
32
U17
NC
NC
NC
WE/
RAS/
CAS/
C69
Y1
C76
NC
82
13
95
87
39
2
23
41
60
71
90
15
14
13
83
67
76
96
66
68
70
69
78
65
64
63
62
61
59
57
56
72
43
42
40
38
37
36
35
34
49
48
47
46
45
44
33
32
74
75
24
86
88
87
22
80
81
77
79
82
53
97
95
94
91
55
54
85
84
12
11
9
7
6
5
4
3
2
1
30
29
28
27
26
25
19
18
17
99
31
20
89
93
100
16
10
U10
[5/B8]
ZRST_LEXI3
R74
C77
R75
R91
[5/B8]
ZCLK_LEXI3
ZWAIT/
[5/C8]
[5/C8]
ZINT/
ZM1/
[5/C5]
ZIORQ/
[5/C5]
[5/C5]
ZWR/
ZRD/
[5/C5]
[5/B6]
ROM_A15
RAM_EN/
[5/A6]
[5/B5]
ROM_EN/
EEPROM_CLK
[5/A8]
10K
R84
10K
R87
10K
R83
10K
R86
10K
R88
10K
R89
10K
R85
10K
R90
R92
NC
NC
R121
10K
R116
10K
R120
10K
NC
NC
R100
C68
R95
1
8
0
R103
180
R104
180
R98
0
R106
0
R97
0
Summary of Contents for 200
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