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Lexicon 200 Service Manual Download Page 48

MPX 200 

Service Manual

6-12

LED_ROW18/

2

DISP3 (Segment C)

D8 (-3dB)

D42 (Bypass Button LED)

LED_ROW19/

3

DISP3 (Segment B)

D6 (R_Signal)

D9 (-10dB)

LED_ROW20/

4

DISP3 (Segment A)

D43 (Tap/Cancel Button

D10 (-20dB)

U2 data bits FRNT_D[7:5] are active high and they activate the three columns; the columns are connected
to the LED anodes, so the column signals are by necessity active high. As can be surmised, a write must
be done to this address whenever the software tries to turn on any LEDs at all. The data that is latched into
this register for these data bits are inverted by three of the gates inside U1. The resultant inverted bits are
then used to activate three transistors (Q1-Q3) that provide enough current to light the LEDs in each
column. Since these transistors are PNP types, a second inversion takes place. It could be thought of as
writing a logic 1 to any of these three bits and they are current boosted to drive the LED anodes. These bits
are continuously written by software in a cyclical fashion; no more than one of these bits is active at any
given time.

The next table illustrates the column arrangement as it pertains to these three data bits.
Address: 0x4C04
Write Only

Data Bus Bits (FRNT_D[7:5])

Active Row

Bit 5 (Column 0)

Bit 6 (Column 1)

Bit 7 (Column 2)

LED_ROW0/

D23 (Dual Stereo)

D21 (Chorus)

DISP1 (Segment F)

LED_ROW1/

D32 (Threshold:EDIT)

D24 (Cascade)

DISP1 (Segment G)

LED_ROW2/

D25 (Mono Split)

D33 (Attack)

DISP1 (Segment E)

LED_ROW3/

D26 (Dual Mono)

D17 (Flange)

DISP1 (Segment D)

LED_ROW4/

D15 (Plate)

D27 (Mix)

DISP1 (Segment C)

LED_ROW5/

D12 (Chamber)

DISP2 (Segment A)

DISP1 (Segment B)

LED_ROW6/

D29 (EQ)

D5 (R_MID)

DISP1 (Segment A)

LED_ROW7/

D35 (Load Button LED)

DISP2 (Segment F)

D28 (Adjust)

LED_ROW8/

D11

DISP2 (Segment G)

D19 (Hall)

LED_ROW9/

D20 (Ambience)

DISP2 (Segment E)

D30 (Lvl/Bal)

LED_ROW10/

D38 (Store Button LED)

DISP2 (Segment D)

D13 (Gate)

LED_ROW11/

D14 (Echo/Delay)

DISP2 (Segment C)

D22 (Pitch/Detune)

LED_ROW12/

D2 (L_MID)

DISP2 (Segment B)

DISP1 (Decimal Pt.)

LED_ROW13/

D4 (R_CLIP)

DISP2 (Decimal Pt)

D16 (Room)

LED_ROW14/

DISP3 (Segment F)

D7 (Threshold: Compressor)

D31 (Ratio)

LED_ROW15/

DISP3 (Segment G)

D18 (Rotary/Tremolo)

D34 (Release)

LED_ROW16/

DISP3 (Segment E)

D1 (L_Clip)

D37 (Compressor Button

LED_ROW17/

DISP3 (Segment D)

D36 (Edit Button LED)

D3 (L_Signal)

LED_ROW18/

DISP3 (Segment C)

D8 (-3dB)

D42 (Bypass Button LED)

LED_ROW19/

DISP3 (Segment B)

D6 (R_Signal)

D9 (-10dB)

LED_ROW20/

DISP3 (Segment A)

D43 (Tap/Cancel Button

D10 (-20dB)

De-coupling capacitors are distributed evenly throughout the front panel PCB and provide power supply de-
coupling for the 5V digital line.

Sheets 2 and 3

These sheets show the non-button related LEDs. The previous section illustrates the row-column
arrangement of these LEDs. No further discussion on this page is necessary.

Sheet 4

This sheet shows the arrangement of the Front Panel buttons and their respective LEDs. The LEDs have
been covered in previous sections, and no further discussion will take place here.

Summary of Contents for 200

Page 1: ...MPX 200 24 Bit Dual Channel Processor Service Manual ...

Page 2: ... maintenance Instructions in this accompanying literature Notice This equipment generates and uses radio frequency energy and if not installed and used properly that is in strict accordance with the manufacturer s instructions may cause interference to radio and television reception It has been type tested and found to comply with the limits for a Class B computing device in accordance with the sp...

Page 3: ...or polarization of the unit s power cord Not applicable in Canada Power Cord Protection Route power supply cords so that they are not likely to be walked on or pinched by items placed on or against them paying particular attention to cords at plugs convenience receptacles and the point at which they exit from the unit Nonuse Periods Unplug the power cord of the unit from the outlet when the unit i...

Page 4: ...GEROUS PROCEDURE WARNINGS Warnings such as the example below precede potentially dangerous procedures throughout this manual Instructions contained in the warnings must be followed WARNING Dangerous voltages capable of causing death are present in this instrument Use extreme caution when handling testing and adjusting SAFETY SYMBOLS General definitions of safety symbols used on equipment or in man...

Page 5: ...T Test 12 4 3 I O Test 4 3 Setup 4 4 Analog In To Analog Out Audio Test 4 4 Frequency Response 4 4 Analog In To Analog Out Frequency Response Test 4 4 THD N Measurement 4 4 Analog In To Analog Out THD N Test 4 4 Crosstalk Test 4 4 Analog In To Analog Out Crosstalk Test 4 4 Dynamic Range Test 4 5 Analog In To Analog Out Dynamic Range Test 4 5 Digital I O Functionality 4 5 Listening Test 4 5 Shock T...

Page 6: ... Walkthrough 6 10 Chapter 7 Parts List 7 1 MPX200 MAIN BOARD ASSEMBLY 7 1 MPX200 FRONT PANEL BOARD ASSEMBLY 7 3 MPX200 MECHANICAL ASSEMBLY 7 3 MPX200 POWER CORD OPTIONS 7 3 MPX200 SHIPPING MATERIALS 7 4 Chapter 8 Schematics and Drawings 8 1 Schematics 8 1 Drawings 8 1 ...

Page 7: ...s or headphones Headphones Cables dependent on your signal source Audio Input Cable unbalanced with shield and a male TS phone plug on one end and an appropriate connector on the opposite end for connection to the Low Distortion Oscillator Audio Output Cable unbalanced with shield and a male TS phone plug on one end and an appropriate connector on the opposite end for connection to the Distortion ...

Page 8: ......

Page 9: ...ipment will be accepted without Return Authorization from Lexicon If Lexicon recommends that a MPX 200 be returned for repair and you choose to return the unit to Lexicon for service Lexicon assumes no responsibility for the unit in shipment from the customer to the factory whether the unit is in or out of warranty All shipments must be well packed using the original packing materials if possible ...

Page 10: ......

Page 11: ... typical 20Hz 20kHz unweighted Levels 8dBu typical Resolution 24 Bit Frequency Response Wet Dry 20Hz 20kHz 1dB Crosstalk 55dB THD 0 05 20Hz 20kHz Digital Audio Interface Input Connectors Coaxial RCA type Digital S PDIF Output Connectors Coaxial RCA type 24 bit Digital S PDIF always active Sample Rates 44 1kHz Internal Audio Data Path DSP 24 bit Footswitch Tip Ring Sleeve phone jack for Bypass and ...

Page 12: ......

Page 13: ...hese diagnostic tests should take approximately 10 seconds The diagnostic test sequence is displayed on the front panel LEDs prior to the execution of the test wherever possible for troubleshooting purposes If there is a failure the test number indication LED shown in the table below will remain lit indicating which test has failed and the Red LEVEL LEDs will be lit indicating that a failure has o...

Page 14: ...h Test 8 1 Turn the encoder knob clockwise until the display reads 8 2 Press and release the load button to execute the test 3 The display will read r 8 4 The MPX 200 is now ready to test both the footswitch functions and the front panel switches Footswitches 1 Press and hold the Left footswitch labeled Ring and observe that the Left 30dB headroom LED is lit 2 Release the Left footswitch and obser...

Page 15: ...tore Tap Cancel Clip 12dB 30dB Threshold 3dB 10dB 20dB Compressor Chamber Gate Echo Delay Plate Room Flange Rotry Trmlo Hall Ambience Chorus Pitch Detune C C C C Mix Adjust EQ Lvl Bal Ratio Threshold Attack Release 5 Turn the encoder knob clockwise one position 6 Verify that all of the front panel s LEDs turn off and that the 7 segment display reads 8 8 8 as shown below NOTE All of the segments on...

Page 16: ...from the Left Output to the Right Output and repeat the test Frequency Response These tests will verify the frequency response specifications of the Left and Right analog inputs to the Left and Right output signal paths of the MPX 200 Analog In To Analog Out Frequency Response Test 1 Disable all Filters on the Distortion Analyzer 2 Apply a 1kHz sinewave signal to the MPX 200 Left and Right Inputs ...

Page 17: ...ignal CD player DAT etc to the S PDIF input jack on the back of the MPX 200 2 Connect the S PDIF output for the MPX 200 to a D A converter ex MPX 500 for conversion back to an analog signal 3 Connect the analog output of the D A converter to your amplifier with speaker output Be sure to turn the volume down on the amplifier 4 Set the MPX 200 System Mode for digital Input 5 Set the D A converter fo...

Page 18: ...ing to the unit with the headphones lift a corner of the MPX 200 off of the table approximately 4 inches and then drop 2 Verify that there is no loss of audio or distortion during this action 3 Repeat this test lifting each end of the MPX 200 ...

Page 19: ...01 1 06 1 06 Off 100k 10 500k 44 1kHz D ATHD 0dBFS 0dBFS 22 20k THD N 0 005 0 05 0 0007 Off 100k 10 22k 44 1kHz D AXTALK 0dBFS 0dBFS 997 XTALK dB 95 00 54 94 120 00 Off 100k 10 22k 44 1kHz D ADYNR 60dBFS 60dBFS 997 AMPL dBr 104 25 96 94 120 00 Off 100k 22 22k 44 1kHz A A Files Source Analyzer Left Right Bal Gnd Sample Test Input Input Freq Imp Unbal Float Level Reading Upper Lower Filter Imp Band ...

Page 20: ......

Page 21: ...ic tests have been designed to take less than 10 seconds The diagnostic test sequence is displayed on the front panel LEDs prior to the execution of the test wherever possible for troubleshooting purposes provided the LEDs are functioning properly Throughout this document these LEDs will be referred to as the Diagnostic LEDs These LEDs are used to indicate the corresponding test number and are tur...

Page 22: ...p Cancel button is pressed after a failure has occurred the MPX 200 will run the test continuously The following diagram shows an example of the Diagnostic LEDs Test Error code 4 This code indicates that the Lexichip3 INT Test 4 has failed LEVEL COMPRESSOR L R 1 Threshold indicates Lexichip3 INT test Indicates Error 1 1 0 3dB 0 0 0 10dB 0 Gate 0 0 0 20dB 0 Echo Delay Legend 0 LED off 1 LED on NOTE...

Page 23: ...ce the RAM has been checked for 55 s and filled with AA s the process is then repeated checking for AA s and storing 0 s into memory Following this test is an Address test to verify all the address lines are active Finally the memory is checked for 0 s Before the test is executed the following test code will be displayed on the Diagnostic LEDs Test Test Name Diagnostic LED 3 Lexichip3 WCS COMPRESS...

Page 24: ...ollowing test code will be displayed on the Diagnostic LEDs Test Test Name Diagnostic LED 6 EEPROM EFFECTS Gate If a failure occurs the Red LEVEL LEDs will be turned on in addition to the Diagnostic LED and the CPU will attempt to continuously loop the test for troubleshooting purposes If the Bypass button is pressed the failure is ignored and the next test will be executed If the Tap Cancel butto...

Page 25: ...g the Bypass button while powering on the unit then releasing the Bypass button once the Green LEVEL 30dB LEDs have lit After the Bypass button is released the 7 segment displays as well as the Diagnostic LEDs will indicate the test number selected and the remaining LEDs will shut off For example when the Lexichip3 ADF Test 5 is selected using the Encoder the EFFECTS Echo Delay Diagnostic LEDs wil...

Page 26: ...e Extended Diagnostics for troubleshooting purposes The ROM checksum is a byte size value that is stored in the last location of each bank The test adds the contents of the entire ROM including the Checksum byte The result should equal zero 8 bit value Before the test is executed the following test code will be displayed on the Diagnostic LEDs along with the test number on the 7 segment displays T...

Page 27: ... same test that resides in the power up diagnostics It was included in the Extended Diagnostics for troubleshooting purposes This test will check the program memory space the writeable control store of the Lexichip3 The RAM memory space is first filled with the value 55 hex 01010101 binary then each memory location is read to see if it contains 55 If 55 is in the memory location the location is fi...

Page 28: ... LEDs will light If the test failed the Red LEVEL LEDs will light Lexichip3 ADF Test 5 This test will verify that the Lexichip3 Audio Data File memory is working The Lexichip3 Audio Data File ADF is a fast synchronous 128 word SRAM that provides audio data buffering and storage for external memory references Serial I O and the Host to Lexichip data port ADF locations also function as ARU Registers...

Page 29: ...e Green LEVEL 30dB LEDs will light If the test failed the Red LEVEL LEDs will light DRAM Test 7 The DRAM test is a modified checksum test executed by the Lexichip Each memory location is written with a unique value constructed to exercise all 24 of the DRAM data bits During this operation a modified checksum that alternately adds or subtracts successive values is calculated and stored in the ADF T...

Page 30: ...s pressed the Left 30dB Headroom LED will be lit When the Left Footswitch is released the Left 30dB Headroom LED will go off When the Right Footswitch labeled Tip is pressed the Right 30dB Headroom LED will be lit When the Right Footswitch is released the Right 30dB Headroom LED will go off Front Panel Switches When the Edit button is pressed and held the Edit LED will be lit When the Edit button ...

Page 31: ...to read the data through the MIDI IN jack To run this test a 5 Pin Male DIN to 5 Pin Male DIN Cable also known as a MIDI cable must be connected between the MIDI IN jack and the MIDI OUT jack Before the test is executed the following test code will be displayed on the Diagnostic LEDs along with the test number on the 7 segment displays Test Test Name Diagnostic LED 7 segment display 10 MIDI EFFECT...

Page 32: ...Chorus Pitch Detune C C C C Mix Adjust EQ Lvl Bal Ratio Threshold Attack Release When the encoder knob is turned clockwise one position the front panel LEDs will be turned off and all of the LED segments on the 7 segment displays except for the rightmost decimal point will be lit to read 8 8 8 as shown below When the encoder knob is turned clockwise one position the 7 segment displays will read r1...

Page 33: ...the unit will reset and perform the POST Unused 14 This is not an actual test When executed the 7 segment displays will indicate d14 Before the test is executed the following test code will be displayed on the Diagnostic LEDs along with the test number on the 7 segment displays Test Test Name Diagnostic LED 7 segment display 14 Unused EFFECTS Chorus 14 Pressing the Load button will execute the tes...

Page 34: ...r on the 7 segment displays Test Test Name Diagnostic LED 7 segment display 16 Burn In EFFECTS Hall 16 Pressing the Load button will execute the test The Burn In loop will continuously run the following diagnostics Test Test Name Diagnostic LED 7 segment display 1 ROM COMPRESSOR 20 1 2 SRAM COMPRESSOR 10 2 3 WCS COMPRESSOR 3 3 4 INT COMPRESSOR Threshold 4 5 ADF EFFECTS Eko Dly 5 6 EEPROM EFFECTS G...

Page 35: ...TS VERY HOT Always use caution when testing the unit with the Main PCB removed from the chassis be sure to place a heatsink HEATSINK TO220 75X 5X 5 H Lexicon P N 704 14132 or equivalent onto the voltage regulator at U25 to dissipate excess heat and protect it from reaching thermal shutdown ...

Page 36: ......

Page 37: ...1 and J2 short the input paths to ground when no input cables are plugged in This prevents noise voltages from being generated by this high impedance D1 and D2 provide clamping protection of the input signal paths into U1 and U2 while R6 and R19 provide input current limiting to U1 and U2 The diodes ensure that the non inverting inputs of the op amps never see voltages more than 0 7V above or belo...

Page 38: ... limiting protection The unbalanced output jacks J3 and J4 are configured so that when only the right output is used J3 the left and right signals are summed together to provide a monophonic output The left jack J4 can support stereo headphones if J3 is unused The right channel is provided on the tip and the left channel on the ring of a stereo phone jack C63 and C73 provide RFI suppression at the...

Page 39: ... Data is clocked in on the rising edge of the 64fs clock and is aligned with the second bit clock following the leading edge of each transition of the fs clock This alignment is determined by programming the Lexichip3 Serial Transmit Port SDOUT0 to support I2S Digital de emphasis is hardwired for 44 1kHz support De emphasis may be turned on or off by toggling the DEM0 pin either 1 De emphasis is o...

Page 40: ...hed by programming the Lexichip3 PIOB_4 pin When this signal is low the receiver is in master mode when 0 the receiver is set to slave mode The MPX200 is always operated in slave mode The receiver is hardwired to work in parallel mode with the master clock source set to be the internal PLL Master clock output MCK01 is hardwired to provide 256fs locked to the recovered clock from the input data str...

Page 41: ...n address decoded chip select for this read buffer Address 0x4C00 Function Switch Status read Read Only Switch Status ZD Bus bits 7 6 5 4 3 0 Signal Foot_Bypass Foot_Tap Switch_Row1 Switch_Row0 ENC_3 0 Foot_Bypass 1 Foot_Bypass switch is not pressed 0 Foot_Bypass switch is pressed Foot_Tap 1 Foot_Tap switch is not pressed 0 Foot_Tap switch is pressed Switch_Row1 This is the OR of the Bypass Edit a...

Page 42: ...TPUT signal is generated by the Lexichip3 and is fed to current loop driver Q4 and out J6 FB4 and FB5 and the connector shield ground connection reduce RFI R149 provides an input bias current to Q4 while C111 and C110 reduce RFI C109 and R147 are provisions for AC or DC coupling the mechanical shell of J6 to chassis ground Currently this is DC coupled through R147 with C109 left unpopulated R150 a...

Page 43: ...terface user program storage flash ROM and chip select buffers used throughout the design Z80 Memory Flash and User Program Storage The Z80 U19 handles all basic system control and user interface I O operation Normally the Z80 clock ZCLK is derived from the Lexichip3 M_ZCLK pin via multiplexor U9 However when RESET is asserted before the Lexichip3 is functioning U9 feeds a clock signal generated b...

Page 44: ...e impedimenta necessary to implement DSP algorithms These are comprised of the Lexichip3 the Audio Memory and the clock oscillator Lexichip3 Configuration resistors R83 R90 set the operating mode of the Lexichip3 via the internal data bus ZD 7 0 when the RESET is released The resistors set this configuration constant as follows ZD Bits 7 6 5 4 2 1 0 Resistor R86 R83 R87 R84 R88 R89 R85 R90 Set 0 0...

Page 45: ...ms this value effectively slows down the edge rates of these two signals The remaining bus signals LEX_A 2 9 are less active and therefore do not require edge rate reduction R94 R96 through R98 R102 R105 and R106 are set to 0 ohms Control signals CAS RAS and WE require edge rate reduction due to their high level of activity Therefore R95 R103 and R104 are 180 ohms Master Clock Generator Y1 C76 C77...

Page 46: ...r via R173 This same point ties the front panel to Earth by way of a keystone bracket that mechanically attaches to a threaded stud on the front panel C130 provides a common mode filter across the LINE and NEUTRAL AC lines F1 is a 250mA slo blo fuse in series with the LINE and power switch lines J10 and J11 SW2 is a voltage select switch that configures the dual winding interconnections on the pow...

Page 47: ...3 Dual Stereo D21 Chorus DISP1 Segment F LED_ROW1 1 D32 Threshold EDIT D24 Cascade DISP1 Segment G LED_ROW2 2 D25 Mono Split D33 Attack DISP1 Segment E LED_ROW3 3 D26 Dual Mono D17 Flange DISP1 Segment D LED_ROW4 4 D15 Plate D27 Mix DISP1 Segment C LED_ROW5 5 D12 Chamber DISP2 Segment A DISP1 Segment B LED_ROW6 6 D29 EQ D5 R_MID DISP1 Segment A LED_ROW7 7 D35 Load Button LED DISP2 Segment F D28 Ad...

Page 48: ...D24 Cascade DISP1 Segment G LED_ROW2 D25 Mono Split D33 Attack DISP1 Segment E LED_ROW3 D26 Dual Mono D17 Flange DISP1 Segment D LED_ROW4 D15 Plate D27 Mix DISP1 Segment C LED_ROW5 D12 Chamber DISP2 Segment A DISP1 Segment B LED_ROW6 D29 EQ D5 R_MID DISP1 Segment A LED_ROW7 D35 Load Button LED DISP2 Segment F D28 Adjust LED_ROW8 D11 DISP2 Segment G D19 Hall LED_ROW9 D20 Ambience DISP2 Segment E D3...

Page 49: ...e LEDs are used here as well Each column signal is applied to a forward biased diode D39 D41 The cathodes of these diodes each connect to two switches The other sides of the switches are tied in groups of three to either SWITCH_ROW0 or SWITCH_ROW1 The following table illustrates the arrangement of the switch matrix Column_2 Column_1 Column_0 SWITCH_ROW0 Bypass Edit Tap Cancel SWITCH_ROW1 Store Com...

Page 50: ......

Page 51: ...M RO 5 1 10W 18K OHM 1 00 R110 203 10424 RESSM RO 1 1 10W 4 99K OHM 2 00 R37 41 203 10581 RESSM RO 1 1 10W 3 32K OHM 1 00 R15 203 10583 RESSM RO 1 1 10W 10 0K OHM 3 00 R48 49 62 203 10840 RESSM RO 1 1 10W 750 OHM 2 00 R4 20 203 10894 RESSM RO 1 1 10W 340 OHM 4 00 R10 11 25 26 203 10896 RESSM RO 1 1 10W 1 00K OHM 1 00 R60 203 10991 RESSM RO 1 1 10W 1 40K OHM 2 00 R51 52 203 11075 RESSM RO 1 1 10W 9...

Page 52: ...SOIC 1 00 U14 340 10877 ICSM LIN 4556 DUAL OP AMP SOIC 1 00 U6 340 11573 ICSM LIN NJM4580 DUALOPAMP SOP 4 00 U1 4 340 11576 ICSM LIN 7905 5V REG TO263 1 00 U11 340 13540 IC LINEAR LM2940C 5V REG TO220 1 00 U25 340 14643 ICSM LIN 3 3V REG LOPWR SOT23 1 00 U12 345 14649 ICSM RCVR AK4112 24B 96k VSOP 1 00 U13 346 10508 ICSM SS SWITCH 74HC4053 SOIC 1 00 U7 350 10545 ICSM SRAM 8KX8 80NS SOIC 50uA 1 00 ...

Page 53: ...D 6MM FL BLK LINE 1 00 550 11931 BUTTON 24X 64 BLK W LT PIPE 6 00 550 14168 KNOB 85D 6MM FL BLK 1 00 630 14688 SPCR 4 40X1 1 4 1 4HEX NYL 3 00 MAIN BD 635 12831 SPCR 14IDX 25ODX 375L AL 3 00 FP BD TO FP 640 02377 SCRW 4 40X1 4 PNH PH BLK 5 00 SPCRS TO COVER 3 COVER TO FP 2 640 02812 SCRW 4 40X3 8 PNH PH BLK 2 00 AC CONN TO COVER 1 REGULATOR TO CVR 1 640 14115 SCRW 4 40X3 16 PNH PH NYL 3 00 SPCRS T...

Page 54: ... 6A 2M AUSTRALIA 1 00 680 10097 CORD POWER IEC 6A 2M JAPAN 1 00 680 10098 CORD POWER IEC 6A 2M UNIVERSAL 1 00 MPX200 SHIPPING MATERIALS PART NO DESCRIPTION QTY EFFECTIVE INACTIVE REFERENCE 070 14692 GUIDE USER ERRATA MPX200 1 00 03 27 01 070 14738 GUIDE USER MPX200 1 00 730 14181 INSERT FOAM ENDCAP 1UX5 5 2 00 730 14720 BOX 22X8X4 DSPLY MPX200 1 00 750 14739 CD LIT MULTI LANG MPX200 1 00 ...

Page 55: ...nd Drawings Schematics 060 14659 SCHEM MAIN BD MPX200 060 14669 SCHEM FP BD MPX200 Drawings Component Layout Main Board MPX200 Component Layout Front Panel Board MPX200 080 14718 ASSY DWG CHASSIS MPX200 080 14719 ASSY DWG SHIPMENT MPX200 ...

Page 56: ......

Page 57: ...TORS ARE 5 3 UNLESS OTHERWISE INDICATED CAPACITORS ARE UF V MONO LEFT O P PHONES MONO SHEET NUMBER RIGHT I P LEFT I P RIGHT O P GAIN STAGE SPARES MUTE SWITCH SCHEM MAIN BD MPX200 8 060 14659 DOCUMENT CONTROL BLOCK 060 14659 1 OF 8 2 OF 8 3 OF 8 4 OF 8 5 OF 8 6 OF 8 7 OF 8 8 OF 8 INPUT BUFFER OUTPUT STAGE RWH 8 18 00 CAM 9 28 00 JV CW ANALOG I O REVISION NUMBER TITLE R1 CODEC REGULATORS BYPASS CAPS...

Page 58: ...8 4 Your Notes ...

Page 59: ...40 1 22 16 20K 20K 1500PF 1500PF 22 16 22 16 3300PF 3300PF 20K 20K 12 15 00 2 REVISED PER DCR 001109 00 11 10 00 RWH 12 15 00 JV CW JLM 12 27 00 JLM 10 17 00 10 17 00 CW CAM 10 12 00 1 REVISED PER DCR 001002 00 9 28 00 9 28 00 CAM 9 28 00 JV CW RWH 8 18 00 SCHEM MAIN BD MPX200 8 060 14659 BIAS CODEC 10 4 00 RWH 2 2 2 12 27 2000_15 49 14659 2 R28 R12 6 B8 LEX_256FS 6 B8 D A_DATA 3 C4 6 B8 LEX_FS 3 ...

Page 60: ...8 6 Your Notes ...

Page 61: ... 10 00 RWH 12 15 00 JV CW JLM 12 27 00 JLM 10 17 00 10 17 00 CW CAM 10 12 00 1 REVISED PER DCR 001002 00 9 28 00 9 28 00 CAM 9 28 00 JV CW RWH 8 18 00 ENCODER S PDIF IN SPARES S PDIF OUT 8 060 14659 SCHEM MAIN BD MPX200 S PDIF INTERFACE 10 4 00 RWH 2 LEX_SDIN1 6 B8 6 B8 SP_MCLK NC R111 180 R112 0 NC 12 27 2000_15 53 3 14659 2 3 C121 4 C6 FOOT_BYPASS R108 0 R109 180 17 15 13 11 9 7 3 5 19 U15 C108 ...

Page 62: ...8 8 Your Notes ...

Page 63: ... 9 28 00 CAM 9 28 00 JV CW RWH 8 18 00 MIDI INPUT FOOTSWITCH SCHEM MAIN BD MPX200 MIDI OUTPUT 8 060 14659 RESET GENERATOR CONTROL I O RESET 10 4 00 RWH 2 FRONT PANEL CONNECTOR C120 14659 2 12 27 2000_15 53 4 4 R64 RESET 8 9 U14 11 10 U14 C119 C109 C118 R147 FB3 FOOT_TAP 3 B6 R61 10V_UNREG R63 R62 C66 D3 R60 3 B6 SWITCH_ROW1 10 1 2 3 4 5 6 7 8 9 11 12 13 14 15 16 J12 D8 FOOT_BYPASS 3 B6 C123 C124 1...

Page 64: ...8 10 Your Notes ...

Page 65: ...10NS Z80 RESET ACCESS TIME 90NS ROM RAM uPROC 10 4 00 RWH 2 NC 14659 2 12 27 2000_15 55 5 5 ZCLK E2 R82 0 R80 180 2 3 4 6 5 8 7 1 U8 EEPROM_CLK 6 A3 SERIAL_DATA 6 B8 6 A3 ZINT ZWAIT 6 A3 3 B8 4 A6 6 A6 RESET ZRST_LEXI3 6 A3 ZCLK_LEXI3 6 A3 6 B3 RAM_EN ROM_EN 6 B3 5 6 U14 6 B8 REG_SEL 47 R153 47 R152 47 R151 1 2 3 6 4 5 15 14 13 12 11 10 9 7 U21 NC NC R156 0 R155 4 B6 ROW_REG_0 4 B6 ROW_REG_1 R139 ...

Page 66: ...8 12 Your Notes ...

Page 67: ...CW JLM 12 27 00 JLM 10 17 00 10 17 00 CW CAM 10 12 00 1 REVISED PER DCR 001002 00 9 28 00 9 28 00 CAM 9 28 00 JV CW RWH 8 18 00 CONFIGURATION RESISTORS SCHEM MAIN BD MPX200 8 060 14659 LEXICHIP3 10 4 00 RWH 2 LEX_A2 LEX_A0 LEX_A1 LEX_A2 LEX_A3 LEX_A4 LEX_A5 LEX_A6 LEX_A7 LEX_A8 LEX_A9 LEX_A 9 0 LEX_A9 LEX_A8 LEX_A7 LEX_A6 LEX_A5 LEX_A4 LEX_A3 LEX_A1 LEX_A0 14659 2 12 27 2000_15 57 6 6 LEX_FS 2 B8 ...

Page 68: ...8 14 Your Notes ...

Page 69: ... 25 1 25 1 25 1 25 1 25 1 25 1 25 1 25 1 25 1 25 1 25 1 25 1 25 1 25 1 25 1 25 47 16 2 5TURN 2 5TURN 100 25 1000 25 470PF 1 25 12 15 00 2 REVISED PER DCR 001109 00 11 10 00 RWH 12 15 00 JV CW JLM 12 27 00 JLM 10 17 00 10 17 00 CW CAM 10 12 00 1 REVISED PER DCR 001002 00 9 28 00 9 28 00 CAM 9 28 00 JV CW RWH 8 18 00 BYPASS CAPACITORS SCHEM MAIN BD MPX200 8 060 14659 REGULATORS BYPASS CAPS 2 10 4 00...

Page 70: ...8 16 Your Notes ...

Page 71: ... CAM 1 6 01 3 REVISED PER DCR 001227 00 A 1 5 01 RWH 12 15 00 2 REVISED PER DCR 001109 00 11 10 00 RWH 12 15 00 JV CW JLM 12 27 00 1 REVISED PER DCR 001002 00 9 28 00 9 28 00 CAM 9 28 00 JV CW RWH 8 18 00 FRONT PANEL GROUND AC SCHEM MAIN BD MPX200 INPUT 8 060 14659 POWER SWITCH POWER TRANSFORMER FRONT EXTRUSION KEYSTONE RWH 10 4 00 JLM 10 17 00 10 17 00 CW CAM 10 12 00 DIGITAL GROUND COPPER FLOOD ...

Page 72: ...8 18 Your Notes ...

Page 73: ...3 00 JLM 10 2 00 CW CAM 10 2 00 Address 0x4C02 Address 0x4C03 Address 0x4C04 4 LEDS SEVEN SEGMENT DISPLAYS BUTTONS 1 OF 4 2 OF 4 3 OF 4 4 OF 4 14669 1 1 1 10 18 2000_10 55 FRNT_D6 FRNT_D7 FRNT_D6 FRNT_D5 FRNT_D4 FRNT_D3 FRNT_D2 FRNT_D1 FRNT_D0 FRNT_D7 FRNT_D5 FRNT_D4 FRNT_D3 FRNT_D2 FRNT_D1 FRNT_D0 FRNT_D6 FRNT_D5 FRNT_D4 FRNT_D3 FRNT_D2 FRNT_D0 FRNT_D1 FRNT_D7 FRNT_D7 FRNT_D6 FRNT_D5 FRNT_D4 FRNT...

Page 74: ...8 20 Your Notes ...

Page 75: ...ESHOLD ECHO DELAY CHAMBER COMPRESSOR ADJUST THRESHOLD ATTACK RELEASE AMBIENCE ROTRY TRMLO 4 1 LED_ROW_3 LED_ROW_2 LED_ROW_1 LED_ROW_0 LED_ROW_15 LED_ROW_2 LED_ROW_1 LED_ROW_14 LED_ROW_9 LED_ROW_6 LED_ROW_7 LED_ROW_4 1 C3 3 B8 4 A7 LED_ROW_ 20 0 LED_ROW_20 LED_ROW_19 LED_ROW_18 LED_ROW_14 LED_ROW_6 LED_ROW_12 LED_ROW_19 LED_ROW_13 LED_ROW_17 LED_ROW_16 LED_ROW_8 LED_ROW_5 LED_ROW_10 LED_ROW_11 LED_...

Page 76: ...8 22 Your Notes ...

Page 77: ...DCR 000928 00 1 RWH 9 28 00 8 15 00 RWH CAM 9 28 00 9 28 00 CW JV 9 28 00 LEAST SIGNIFICANT DIGIT MOST SIGNIFICANT DIGIT MIDDLE DIGIT 060 14669 1 SCHEM FP BD MPX200 SEVEN SEGMENT DISPLAYS 4 10 18 2000_10 57 3 14669 1 3 COLUMN_0 COLUMN_1 COLUMN_2 COLUMN_ 2 0 1 A3 2 D7 4 D7 LED_ROW_18 LED_ROW_5 LED_ROW_ 20 0 1 C3 2 A7 4 A7 LED_ROW_6 LED_ROW_5 LED_ROW_4 LED_ROW_12 LED_ROW_3 LED_ROW_2 LED_ROW_1 LED_RO...

Page 78: ...8 24 Your Notes ...

Page 79: ...SS TAP CANCEL LOAD COMPRESSOR EDIT BUTTON LEDS LOAD EDIT BYPASS STORE TAP CANCEL COMPRESSOR 1 SCHEM FP BD MPX200 060 14669 BUTTONS CHANGED PER DCR 000928 00 1 RWH 9 28 00 4 Read only address 0x4C00 LED_ROW_ 20 0 1 C3 2 A7 3 B8 LED_ROW_10 LED_ROW_16 LED_ROW_20 LED_ROW_18 LED_ROW_17 LED_ROW_7 COLUMN_ 2 0 1 A3 2 D7 3 C8 COLUMN_0 COLUMN_1 COLUMN_2 COLUMN_0 COLUMN_1 COLUMN_2 COLUMN_0 COLUMN_1 COLUMN_2 ...

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Page 90: ...Lexicon Inc 3 Oak Park Bedford MA 01730 1441 Tel 781 280 0300 Customer Service Fax 781 280 0499 Email csupport lexicon com www lexicon com Lexicon Part No 070 14827 Rev 0 Printed in U S A ...

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