C2000 Debugger | 17
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1989-2023
Lauterbach
<parameters> describing the “DebugPort”
CJTAGFLAGS
<flags>
Activates bug fixes for “cJTAG” implementations.
Bit 0: Disable scanning of cJTAG ID.
Bit 1: Target has no “keeper”.
Bit 2: Inverted meaning of SREDGE register.
Bit 3: Old command opcodes.
Bit 4: Unlock cJTAG via APFC register.
Default: 0
CONNECTOR
[
MIPI34
|
MIPI20T
]
Specifies the connector “MIPI34” or “MIPI20T” on the target. This
is mainly needed in order to notify the trace pin location.
Default: MIPI34 if CombiProbe is used, MIPI20T if µTrace
(MicroTrace) is used.
CORE
<core> <chip>
The command helps to identify debug and trace resources which
are commonly used by different cores. The command might be
required in a multicore environment if you use multiple debugger
instances (multiple TRACE32 PowerView GUIs) to simultaneously
debug different cores on the same target system.
Because of the default setting of this command
debugger#1:
<core>
=1
<chip>
=1
debugger#2:
<core>
=1
<chip>
=2
...
each debugger instance assumes that all notified debug and trace
resources can exclusively be used.
But some target systems have shared resources for different
cores, for example a common trace port. The default setting
causes that each debugger instance controls the same trace port.
Sometimes it does not hurt if such a module is controlled twice.
But sometimes it is a must to tell the debugger that these cores
share resources on the same
<chip>
. Whereby the “chip” does not
need to be identical with the device on your target board:
debugger#1:
<core>
=1
<chip>
=1
debugger#2:
<core>
=2
<chip>
=1
