![Lattice Semiconductor LatticeMico32 Hardware Developer User Manual Download Page 55](http://html1.mh-extra.com/html/lattice-semiconductor/latticemico32/latticemico32_hardware-developer-user-manual_3843852055.webp)
U
SING
THE
L
ATTICE
M
ICO
S
YSTEM
S
OFTWARE
:
Using LatticeMico System as a Stand-Alone Tool
LatticeMico32 Hardware Developer User Guide
49
vlib work
vdel –lib work –all
vlib work
vlog pmi_addsub.v
vlog pmi_ram_dq.v
vlog pmi_ram_dq.v
vlog pmi_ram_dp.v
vlog pmi_ram_dp_true.v
vlog pmi_distributed_dpram.v
vlog pmi_fifo.v
vlog pmi_fifo_dc.v
vlog +SIMULATION \
+../soc+../components/gpio/rtl/../components/
lm32_top/rtl/../components/timer/rtl/../
components/wb_ebr_ctrl/rtl/../components/asram_top/rtl/
../components/uart_core/rtl/../components/
wb_dma_ctrl/rtl/verilog \
../soc/platform.v
vcom ../soc/platform_vhdl.vhd
vlog +../components/lm32_top/rtl/verilog testbench.v
# the VSIM command shown here uses pre-compiled FPGA libraries.
# It may be necessary to compile the behavioral code for the
# FPGA. In this example, the behavioral code was compiled to
# the ecp2_vlg working directory.
# For the ECP2, the behavioral code is located at :
# <isptools>/cae_library/simulation/verilog/ecp2
vsim work.testbench -t 1ps –novopt –L ecp2_vlg
Using LatticeMico System as a Stand-Alone Tool
The software developer can use C/C++ SPE to develop software application
code without having to install Diamond, as long as the directory structure and
appropriate files have been provided by the hardware developer. The files that
the hardware designer provides to the software developers are the Mico
System Builder project file, the LM32 processor driver files and GNU files, the
component driver files, and the FPGA's configuration bitstream.
The hardware developer needs to have both Lattice Diamond and LatticeMico
System installed in order to generate the files and provide them to the
software developer.
The following scenario shows the tasks involved:
Hardware Developer
The hardware developer performs the following
tasks:
1. Uses Diamond to create an FPGA development project.
Note
When doing mixed-language simulation, use the
-t 1ps
command-line option for the
“vsim” command.