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Performing HDL Functional Simulation of LatticeMico32 Platforms
LatticeMico32 Hardware Developer User Guide
41
with the deployed software. The EBR memory size must be large enough
to hold your C/C++ application. In this example, the memory is 128KB,
which is more than enough for the “Hello World” application but too large
for most FPGAs to support.
UART – The UART is an optional component that redirects
stout
and
sterr
to the HDL simulator console.
Refer to the UART data sheet for more details on how to use the UART for
redirecting
stout
and
stderr
to the HDL simulator console.
Configuring the Platform with
LatticeMico System Builder
The LM32 processor instance in the platform, shown in Figure 16, must be
configured to permit functional simulation of software applications through any
HDL simulator. The following steps are required:
Ensure that the LM32 Exception Base Address (EBA) points to the base
address of the memory component that contains the deployed software/
firmware. This address must be aligned to a 256-byte boundary, since the
hardware ignores the least-significant byte. Unpredictable behavior occurs
when the exception base address and the exception vectors are not aligned
on a 256-byte boundary. In the platform shown in Figure 16 on page 40, the
software is deployed in EBR. Therefore, modify the “Location of Exception
Handlers” field in the LM32 processor dialog box to point to the base address
of EBR (0x00020000), as shown in Figure 18.
Directory Structure
When MSB is used to generate a platform, a set of directories is created in a
top-level platform directory. The top-level directory is automatically assigned
the same name as the MSB project name, which is Platform in this example.
<
path_to_toplevel_directory
>/Platform
components
soc
Figure 17: EBR Setup
