iCE40 UltraPlus Mobile Development Platform
Evaluation Board User Guide
© 2017-2018 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at
www.latticesemi.com/legal
.
All other brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
24
FPGA-EB-02007-1.1
Figure A.3. iCE40UP5K FPGA B - Audio
5
5
4
4
3
3
2
2
1
1
D
D
C
C
B
B
A
A
LATTICE SEMICONDUCTOR CORPORATION CONFIDENTIAL
Note:
Place close
to DUT
iCE40 UltraPlus Mobile Development Platform
DONE_B
Note:
Place close
to DUT
Note:
Place close
to DUT
Note:
Place close
to DUT
Note:
Place close
to DUT
VCC Sense Resistors - 1 Ohm 0603
Add test points on both sides
SPIVCCIO1_iCE_B
SPIVCCIO1_iCE_B
VCC_iCE_B
VPP2V5_B
VCCIO2_iCE_B
VCCIO0_iCE_B
VCCPLL_IN_B
VCC3V3
VCC2V5
VCC1V2
VCC3V3
VCC_iCE_B
VCCPLL_IN_B
VPP2V5_B
VCCIO0_iCE_B
SPIVCCIO1_iCE_B
VCCIO2_iCE_B
VCC3V3
VCC3V3
I2S_SCK_mic
{8}
I2S_WS_mic
{8}
I2S_SD_mic3_mic4
{8}
I2C_amp_sda
{8}
I2S_SD_mic1_mic2_onboard
{8}
CDONE
{2,4,5,6,11}
I2S_WS_amp
{8}
I2S_SCK_amp
{8}
I2S_SD_amp
{8}
iCE_SI_B
{6}
iCE_SO_B
{6}
iCE_SS_B
{6}
iCE_SCK_B
{6}
I2C_amp_scl
{8}
I2S_SD_mic1_mic2_card
{8}
I2S_SD_mic5_mic6
{8}
I2S_SD_mic7
{2,8}
OSC_CLK
{2,4,5,8,10,13}
UART_TX
{2,4,5,6,10,13}
UART_RX
{2,4,5,6,10,13}
proc_cs
{2,4,5,6,10}
proc_intr
{2,4,5,6,10}
CRSTb
{2,4,5,6,10,11,13}
PDM_SD_mic1_mic2_onboard
{8}
Title
Size
Document Number
Rev
Date:
Sheet
of
D
iCE40UP5K FPGA B - Audio
B
3
14
Friday, November 03, 2017
Title
Size
Document Number
Rev
Date:
Sheet
of
D
iCE40UP5K FPGA B - Audio
B
3
14
Friday, November 03, 2017
Title
Size
Document Number
Rev
Date:
Sheet
of
D
iCE40UP5K FPGA B - Audio
B
3
14
Friday, November 03, 2017
C102
10n
D11
GREEN
2
1
C109
0.1u
R185
1
TP53
TP55
TP33
C105
0.1u
R147
0
TP36
J25
iCEA Control
1
3
5
7
9
2
4
6
8
10
11
12
R148
0
R169
0
J30
CON24A
DNL
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
R150
0
DNI
C35
1u
C78
0.1u
C107
1u
R84
100
TP57
TP32
C108
10n
Bank2
Bank1
Bank0
iCEUP5K-WLCSP30
iCE5UP5K-WLCSP30
U2
IOB_0A
E5
IOB_2A
D5
IOB_3B_G6
F5
IOB_9B
E4
IOB_10A
C3
IOB_11B_G5
F4
CRESET_B
F3
IOB_12A_G4_CDONE
D3
IOB_13B
E3
IOB_24A
B1
IOB_25B_G3
F2
IOB_32A_SPI_SO
F1
IOB_33B_SPI_SI
E1
IOB_34A_SPI_SCK
D1
IOB_35B_SPI_SS
C1
VCCPLL
B2
IOT_36B
A1
IOT_37A
A2
IOT_46B_G0
B3
IOT_47A
A4
RGB2
A5
RGB1
B5
RGB0
C5
G
N
D
B
4
G
N
D
E
2
VCC
C2
VCCIO_0
A3
SPI_VCCIO1
D2
VCCIO_2
C4
VPP_2V5
D4
R188
1
TP34
C103
1u
R186
1
R149
0
DNI
C101
0.1u
R184
1
TP37
TP56
C106
10n
TP58
TP54
C104
10u
R203
100k
R170
0
R168
0
TP35
C34
0.1u
C88
10n
R49
2k2
R189
1
C80
1u
R30
0
R187
1
I2S_SCK_mic
I2S_WS_mic
CDONE
I2S_WS_amp
VCCPLL_B
iCE_SS_B
iCE_SCK_B
iCE_SI_B
iCE_SO_B
UART_TX_B
UART_RX_B
OSC_CLK_B
CDONE_B
CRSTb_B
proc_cs_B
I2S_SD_mic3_mic4
I2S_SD_mic5_mic6
I2S_SD_mic7
I2S_SCK_mic
I2S_SD_mic1_mic2
proc_intr_B
I2S_WS_amp
I2S_WS_mic
I2C_amp_sda
I2C_amp_scl
I2S_SCK_amp
I2S_SD_amp
I2S_SCK_amp
I2C_amp_sda
I2S_SD_mic3_mic4
CDONE_B
I2S_SD_amp
I2S_SD_mic1_mic2_onboard
iCE_SS_B
iCE_SCK_B
iCE_SI_B
iCE_SO_B
I2C_amp_scl
I2S_SD_mic1_mic2_card
I2S_SD_mic5_mic6
I2S_SD_mic7
OSC_CLK_B
VCCPLL_B
UART_TX_B
UART_RX_B
OSC_CLK_B
proc_cs_B
I2S_WS_amp
I2S_SCK_amp
I2S_SD_amp
I2C_amp_sda
I2C_amp_scl
I2S_SD_mic5_mic6
I2S_SD_mic7
iCE_SS_B
iCE_SCK_B
iCE_SI_B
iCE_SO_B
CRSTb_B
I2S_SCK_mic
I2S_SD_mic1_mic2
I2S_SD_mic3_mic4
proc_intr_B
I2S_WS_mic
UART_TX_B
UART_RX_B
proc_cs_B
proc_intr_B
CRSTb_B
I2S_SD_mic1_mic2_onboard
I2S_SD_mic1_mic2_card
I2S_SD_mic1_mic2
I2S_SD_mic1_mic2
CDONE_B
CDONE
CRSTb_B
I2S_SD_mic1_mic2
PDM_SD_mic1_mic2_onboard
