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iCE40 UltraPlus Mobile Development Platform
Evaluation Board User Guide
© 2017-2018 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at
www.latticesemi.com/legal
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All other brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
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FPGA-EB-02007-1.1
Appendix A. iCE40 UltraPlus Mobile Development Board Schematics
Figure A.1. Block Diagram
5
5
4
4
3
3
2
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1
1
D
D
C
C
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A
LATTICE SEMICONDUCTOR CORPORATION CONFIDENTIAL
Revision History
Rev A - First Draft
iCE40 UltraPlus Mobile Development Platform
Revision D
June 27 2017
iCE40 UltraPlus Mobile Development Platform
iCE40UP5K_A:
Display FPGA
Sheet 2
iCE40UP5K_B:
Audio FPGA
Sheet 3
iCE40UP5K_C:
Sensor / RGB FPGA
Sheet 4
iCE40UP5K_D:
Camera FPGA
Sheet 5
Display
Sheet 7
Microphones
Amplifier
Sheet 8
Sensors
RGB
Sheet 9
Camera
Sheet 10
SPI
MUX
Sheet 6
FTDI
Sheet 11
AP Conn
Sheet 6
SPI
Flash
Sheet 6
Switches
Sheet 6
BLE
Module
Sheet 6
Common
Components
Sheet 13
Battery
Sheet 14
Power Supplies
Sheet 12
All pages
Rev C - Changed Gryroscope i2c address by grounding U36-27
- Inserted 2 more pins to iCEA control J25 header, pin 7 & 8
- Added 4 resistors to allow swap of GLED & BLED on U3 device
- Added FT_RESETb on J16.7 - AP INTERCONNECT to allow bypassing of FTDI Chip
- Added 2 PDM Microphones
- Added ESD protection for J5 USB
- Changed D2 - LED2 to GREEN from RED
- Changed R42 resistor value to 18ohm from 12ohm
- Changed U41 and U42 to DG409LDQ-T1-E3 device
- Changed U41 and U42 power to VSUPPLY
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Block Diagram / Cover Page
B
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Thursday, November 02, 2017
Title
Size
Document Number
Rev
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of
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Block Diagram / Cover Page
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Thursday, November 02, 2017
Title
Size
Document Number
Rev
Date:
Sheet
of
D
Block Diagram / Cover Page
B
1
14
Thursday, November 02, 2017