22
HDR-60 Base Boar
d – Revision B
Appendix A. Sc
hem
a
tic
Figu
re
15
. Bloc
k Dia
g
ram
5
5
4
4
3
3
2
2
1
1
D
D
C
C
B
B
A
A
HDR-60 Base Board Block Diagram
(Sheet 2, 3)
Voltage
Regulators
SerDes
(Sheet 5)
Quad
A
Lattice
ECP3-70
4
8
4 ball
Bank8
(Sheet 6)
Bank0
Bank1
Bank2
Bank3
(Sheet 4)
(Sheet 8)
(Sheet 8)
(Sheet 7)
Bank7
(Sheet 4)
Bank6
(Sheet 9)
(Sheet 4)
1000Base-T
PHY/RJ45
(Sheet 6)
Built In USB
2.0 Download
Programming
Re
v
B, 4
8
4
b
all, -70
(top
v
ie
w
)
A
1
(Sheet 5)
DVI
(Sheet 8)
Aptina
Head Board
(Sheet 7)
DDR2 16 Bit
(Sheet 9)
Teradek MPEG
Encoder, USB
(Sheet 8)
Nanovesta
Head Board
(Sheet 4)
Nanovesta
Head Board
Title
Size
Project
Re
v
Date:
Sheet
of
Lattice Semiconductor Corporation
5555 N.E. Moore Court
Hillsboro, Oregon. 97124
HDR-60 Base Board Schematic
B
Block Dia
g
ram
C
1
10
W
ednesday, Septem
b
er 21, 2011
Title
Size
Project
Re
v
Date:
Sheet
of
Lattice Semiconductor Corporation
5555 N.E. Moore Court
Hillsboro, Oregon. 97124
HDR-60 Base Board Schematic
B
Block Dia
g
ram
C
1
10
W
ednesday, Septem
b
er 21, 2011
Title
Size
Project
Re
v
Date:
Sheet
of
Lattice Semiconductor Corporation
5555 N.E. Moore Court
Hillsboro, Oregon. 97124
HDR-60 Base Board Schematic
B
Block Dia
g
ram
C
1
10
W
ednesday, Septem
b
er 21, 2011
