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CrossLink LIF-MD6000 Master Link Board 
Evaluation Board User Guide 
 

© 2016-2018 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at 

www.latticesemi.com/legal

. All other brand or product names are 

trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice. 

32 

 

FPGA-EB-02010-1.4 

LIF-MD6000 Master Link Board Bill of Materials 

(Continued) 

Item  Reference 

Quantity  Part 

PCB 
Footprint

 

Comments 

Part_ 
Number 

Manufacturer 

Description 

86 

SW2, SW3, SW4 

SYS_ 
RST 

2psmd_es
witch 

— 

TL1015AF160QG  E-Switch 

SWITCH TACTILE SPST-
NO 0.05 A 12 V 

87 

SW5 

WAKE_ 
UP 

2psmd_es
witch 

— 

TL1015AF160QG  E-Switch 

SWITCH TACTILE SPST-
NO 0.05 A 12 V 

88 

U1 

FT2232HL 

tqfp64_0p
5_12p2x1
2p2_h1p6 

— 

FT2232HL 

FTDI 

USB to UART / FIFO 

89 

U2 

93LC56-SO8 

so8_50_2
44 

— 

93LC56C-I/SN 

Microchip 

IC 93LC56 EEPROM 

90 

U3 

FUSE 

0154004D
RT 

— 

0154004.DRT 

Littlefuse 

Surface Mount Fuses 
Fuseblock with fuse 4A 
OMNI BLOK 154T 

91 

U5 

NCP1117ST
33T3G 

sot223_4p 

— 

NCP1117ST33T3G  On Semi 

IC Reg LDO 3.3 V SOT-
223 

92 

U6 

NCP1117ST
25T3G 

sot223_4p 

— 

NCP1117ST25T3G  On Semi 

IC Reg LDO 2.5 V SOT-
223 

93 

U7, U9, U11, 
U12 

Hirose - 
FX12 - 40 
Pos 

Hirose-
FX12 

— 

FX12B-40P-0.4SV 

Hirose Electric 
Co Ltd 

Conn Board to Board PL 
40 POS  
0.4 mm Solder ST SMD 
T/R 

94 

U8 

LIF-
MD6000-
csfBGA81 

LIF-
MD6000-
csfBGA81 

Customer 

supplied 

LIF-MD6000-
csfBGA81 

Lattice 
Semiconductor 

Lattice Semiconductor 
6K CrossLink FPGA 
Family 

95 

U14 

M25PX16-
VMW6TG 

SOIC8 

— 

M25PX16-
VMW6TG 

Micron 
Technology Inc 

IC FLASH  
16 Mbit  
75 MHz 8SO 

96 

U15 

AP7313-
12SAG-7 

SOT23 

— 

AP7313-12SAG-7  Diodes Inc 

LDO Voltage Regulators 
LDO SOT-23R  
1.2 V/ 150 mA 

97 

U17 

NCP1117ST
18T3G 

sot223_4p 

— 

NCP1117ST18T3G  On Semi 

IC Reg LDO 1.8 V SOT-
223 

98 

U18 

LT3680 

LT3680_1
0QFN 

— 

LT3680EDD#PBF 

Linear 

5 V Step down 
converter 

99 

U19 

LCMXO3LF-
1200E-
MG121 

LCMXO3LF
-1200E-
MG121 

Customer 

supplied 

LCMXO3LF-
1200E-MG121 

Lattice 
Semiconductor 

CPLD MachXO3 Family 
121-Pin CSFBGA- 
0.5 mm Pitch 

100  X1 

12MHZ 

crystal_4p
_3p2x2p5 

— 

7M-12.000MAAJ-

TXC 

12 MHz Crystal 

101  X3, X4 

KC3225A27.
0000C30E0

27MHZ_O
SC 

— 

KC3225A27.0000
C30E0A 

AVX 
Corporation 

Standard Clock 
Oscillators 27.000 MHz 

102 

LIF-MD6000 
MASTER LINK 
BOARD PCB 

— 

— 

— 

305-PD-16-0154 

PACTRON 

— 

 
 

Summary of Contents for CrossLink LIF-MD6000

Page 1: ...CrossLink LIF MD6000 Master Link Board Evaluation Board User Guide FPGA EB 02010 Version 1 4 April 2018...

Page 2: ...erials 27 Appendix C SMA IOL EVN BRD Schematics 33 Appendix D SMA IOL EVN BRD Bill of Materials 34 Appendix E B IOL EVN BRD Schematics 35 Appendix F B IOL EVN BRD Bill of Materials 36 RevisionHistory...

Page 3: ...tive holders The specifications and information herein are subject to change without notice FPGA EB 02010 1 4 3 Acronyms in This Document A list of acronyms used in this document Acronym Definition CM...

Page 4: ...ons of on board jumper settings programming circuit a complete set of schematics and bill of materials for LIF MD6000 Master Link board Refer to Appendix A B C D E F for the schematics and BOM of the...

Page 5: ...istered trademarks patents and disclaimers are as listed at www latticesemi com legal All other brand or product names are trademarks or registered trademarks of their respective holders The specifica...

Page 6: ...OFF SHORT ON J4 External clock input for MIPI D PHY reference clock J6 External or internal clock selection 1 2 External 2 3 Internal J18 External SP I2C access SW2 Configuration reset for LIF MD6000...

Page 7: ...ks with Diamond programmer software to provide interfaces for JTAG to program MachXO2 1300E SPI to program both CrossLink and SPI Flash Memory USB Mini B J2 FTDI Chip U1 SPI Flash U14 LIF MD6000 CSFBG...

Page 8: ...HY I F D PHY Rx LVDS CMOS D PHY Rx LVDS CMOS Tx Connector 2 Tx Connector 1 D PHY I F Figure 3 2 Bridging Block 3 2 I2 C Expander Figure 3 3 shows the block diagram of the I2 C expander The LCMXO3LF 12...

Page 9: ...XO3LF 1300E as well as to the external boards connected to Tx and Rx Headers Each I O and core voltage rail on the board is accessible by a test point on the board The current flowing to each rail can...

Page 10: ...n herein are subject to change without notice 10 FPGA EB 02010 1 4 Table 4 2 Device Power Rail Summary and Test Points Voltage Rail Source Rail Current Sense Resistor Test Points 12 V 12_Ext 12V 5 V 1...

Page 11: ...their respective holders The specifications and information herein are subject to change without notice FPGA EB 02010 1 4 11 5 Status Indicators The LED status indicators on the board show power confi...

Page 12: ...or DATA1_TX_P Pin 7 J6 SMA connector for DATA1_TX_N Pin 8 J7 SMA connector for DATA2_TX_P Pin 13 J8 SMA connector for DATA2_TX_N Pin 14 J9 SMA connector for DATA3_TX_P Pin 16 J10 SMA connector for DAT...

Page 13: ...tents and disclaimers are as listed at www latticesemi com legal All other brand or product names are trademarks or registered trademarks of their respective holders The specifications and information...

Page 14: ...s signals to the 26 pin header J2 Table 7 1 Headers and Test Connectors Part Description Setting J2 13x2 Header U1 Connector to interface to CrossLink Master Link board Table 7 2 U1 Connector Descript...

Page 15: ...change without notice FPGA EB 02010 1 4 15 Table 7 3 J2 Header Description Pin Name Mapping to U1 1 3 3V N A 2 1 8V N A 3 RESETN Pin 22 4 CH4_DCK_TX_P Pin 1 5 SDA Pin 39 6 CH4_DCK_TX_N Pin 2 7 SCL Pin...

Page 16: ...and disclaimers are as listed at www latticesemi com legal All other brand or product names are trademarks or registered trademarks of their respective holders The specifications and information here...

Page 17: ...s of their respective holders The specifications and information herein are subject to change without notice FPGA EB 02010 1 4 17 8 Ordering Information Table 8 1 Ordering Information Description Orde...

Page 18: ...legal All other brand or product names are trademarks or registered trademarks of their respective holders The specifications and information herein are subject to change without notice 18 FPGA EB 02...

Page 19: ...I2C LVDS RX In LVDS RX In SPI BANK 3 4 BANK 2 BANK 0 LCMXO3LF 1300 MG121 JTAG I2C 3 I O Expander I2C Switch Targeted FPGA SPI FLASH I2C SPI SPI I2C 2 I2C 1 SPI SPI I2C D D Da a at t te e e S S Siiiz...

Page 20: ...B B 1 1 1 0 0 0 8 8 8 2 2 2 F F FT T TD D DI I I I I IN N NT T TE E ER R RF F FA A AC C CE E E L L LI I IF F FM M MD D D 6 6 60 0 00 0 00 0 0 6 6 6M M MG G G8 8 81 1 1I I I S S Sn n no o ow w w b b b...

Page 21: ...c c ce e es s se e em m miii c c co o om m m B B Bo o oa a ar r rd d d R R Re e ev v v P P Pr r ro o ojjje e ec c ct t t 1 1 16 6 6 F F FE E EB B B 1 1 16 6 6 B B B 1 1 1 0 0 0 8 8 8 3 3 3 P P PO O OW...

Page 22: ...t t t T T Tiiit t tllle e e L L La a at t tt t tiiic c ce e e S S Se e em m miiic c co o on n nd d du u uc c ct t to o or r r A A Ap p pp p pllliiic c ca a at t tiiio o on n ns s s E E Em m ma a aiiil...

Page 23: ...o o of f f S S Sh h he e ee e et t t T T Tiiit t tllle e e L L La a at t tt t tiiic c ce e e S S Se e em m miiic c co o on n nd d du u uc c ct t to o or r r A A Ap p pp p pllliiic c ca a at t tiiio o...

Page 24: ...Tiiit t tllle e e L L La a at t tt t tiiic c ce e e S S Se e em m miiic c co o on n nd d du u uc c ct t to o or r r A A Ap p pp p pllliiic c ca a at t tiiio o on n ns s s E E Em m ma a aiiilll t t te...

Page 25: ...uF C104 0 1uF C151 0 1uF R404 4 7k R436 680R C105 0 1uF R440 4 7k C141 10uF D23 Red 1 2 R437 680R R405 4 7k SW3 SYS_RST C106 1uF R179 650 D30 blue 1 2 BANK2 LCMXO3LF 1200E MG121 U19C VCCIO2 H6 H7 H9 J...

Page 26: ...y MIPI LVDS Simulation Requirement 1 MIPI Differential Mode insertion Loss shall be 1 6dB at 750 MHz 2 MIPI Differential Mode Return Loss shall be 15dB at 750 MHz 3 MIPI Common Mode Return Loss shall...

Page 27: ...NC Samsung Cap Ceramic 0 1 F 10 V X5R 20 SMD 0402 85C Paper T R 7 C41 C43 C53 C60 C67 C71 6 1 F C0306 LLR185C70G1 05ME05L Murata CAP CER 1 F 4 V X7S 0306 8 C42 C44 2 0 01 F C0201 GRM033R61C 103KA12D M...

Page 28: ...3 GRM188R71E 104KA01D Murata CAP CER 0 1 F 25 V 10 X7R 0603 27 C127 1 680 pF C0603 C0603C681J3 GACTU Kemet CAP CER 680 pF 25 V 5 NP0 0603 28 C128 1 0 47 F C0402 CL05A474KA5 NNNC Samsung CAP CER 0 47 F...

Page 29: ...1 Molex CONN HEADER 8POS 100 VERT TIN 42 J2 1 SKT_MINI USB_B_R A skt_miniu sb_b_ra 5075BMR 05 SM CR Neltron CONN MINI USB RCPT RA TYPE B SMD 43 J3 1 PJ 032A PJ 032A PJ 032A CUI Inc CON PWR JCK 2 0 X 6...

Page 30: ...47 23 0 R0603 RC0603JR 070RL Yageo Res 1 10 W 0 0 5 0603 58 R9 R10 2 2K2 R0603 CRCW06032 K20FKEA Vishay RES SMD 2 2 k 1 1 10 W 0603 59 R11 R17 2 12K R0603 RC0603FR 0712KL Yageo RES SMD 12 k 1 1 10 W 0...

Page 31: ...R117 R119 R121 10 100 R0402 DNI RC0402FR 07100RL Yageo RES SMD 100 1 1 16 W 0402 74 R160 R432 2 100K R0402 RMCF0402JT 100K Stackpole Electronics Inc RES 100 k 1 16 W 5 0402 75 R166 R441 R442 R443 R444...

Page 32: ...17ST 33T3G sot223_4p NCP1117ST33T3G On Semi IC Reg LDO 3 3 V SOT 223 92 U6 1 NCP1117ST 25T3G sot223_4p NCP1117ST25T3G On Semi IC Reg LDO 2 5 V SOT 223 93 U7 U9 U11 U12 4 Hirose FX12 40 Pos Hirose FX12...

Page 33: ...or r r A A Ap p pp p pllliiic c ca a at t tiiio o on n ns s s E E Em m ma a aiiilll t t te e ec c ch h hs s su u up p pp p po o or r rt t t L L La a at t tt t tiiic c ce e es s se e em m miii c c co...

Page 34: ...turer Description 1 GND1 5 V 1 8 V 3 3 V SN SDA SCLK SCL RESETN MOSI MISO GND 12 TP_S_ 40_63 tp_s_40_ 63 DNI Square test point 40 mil inner diameter 63 mil outer diameter 2 C1 C4 2 1 F C0402 C0402C105...

Page 35: ...ate Size Schematic Rev of Sheet Title Lattice Semiconductor Applications Email techsupport Latticesemi com Board Rev Project 04 May 15 B 1 0 1 1 100MILS_DEBUG HEADER LCMXO3L 4300 MG256 MIPI Briding so...

Page 36: ...Quantity Part PCB Footprint Comments Part_ Number Manufacturer Description 1 GND1 5 V 1 8 V 3 3 V SN SCLK MOSI MISO GND 9 TP_S_40_ 63 tp_s_40_63 DNL Square test point 40 mil inner diameter 63 mil out...

Page 37: ...e Version Change Summary April 2018 1 4 Made schematics searchable March 2018 1 3 Added footnote to Table 2 1 September 2017 1 2 Changed document number from EB105 to FPGA EB 02010 Changed J25 from VC...

Page 38: ...7th Floor 111 SW 5th Avenue Portland OR 97204 USA T 503 268 8000 www latticesemi com...

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