CrossLink LIF-MD6000 Master Link Board
Evaluation Board User Guide
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.
All other brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
FPGA-EB-02010-1.4
19
Appendix A. LIF-MD6000-ML-EVN-BRD Schematics
LIF-MD6000 Master Link Board Block Diagram
5
5
4
4
3
3
2
2
1
1
D
D
C
C
B
B
A
A
USB
CONNECTOR
USB to
JTAG / SPI
FTDI
USP Programming only
BANK-1,2
D
P
H
Y
B
L
O
C
K
LIFMD-6000-6MG81I
M
I
P
I
T
X
H
E
A
D
E
R
1
I2C
MIPI TX I/O
B
A
N
K
-
0
LVDS RX HEADER1
SPI
Ext Power
Adaptor (12V)
OnBoard
LDO'S & Buck
1V2,1V8,2V5,3V3,5V
JTAG_I/F/ SPI
M
I
P
I
T
X
H
E
A
D
E
R
2
MIPI TX I/O
LVDS RX HEADER1
I2C
L
V
D
S
R
X
I
n
L
V
D
S
R
X
I
n
S
P
I
BANK-3,4
BANK-2
B
A
N
K
-
0
LCMXO3LF-1300-MG121
J
T
A
G
I
2
C
*
3
I/O Expander - I2C Switch
Targeted FPGA
SPI FLASH
I2C
SPI
S
P
I
I
2
C
*
2
I
2
C
*
1
SPI
SPI
I2C
D
D
Da
a
attte
e
e:::
S
S
Siiizzze
e
e
S
S
Sccch
h
he
e
em
m
ma
a
atttiiiccc R
R
Re
e
evvv
o
o
offf
S
S
Sh
h
he
e
ee
e
ettt
T
T
Tiiitttllle
e
e
L
L
La
a
attttttiiiccce
e
e S
S
Se
e
em
m
miiiccco
o
on
n
nd
d
du
u
ucccttto
o
orrr A
A
Ap
p
pp
p
pllliiiccca
a
atttiiio
o
on
n
nsss
E
E
Em
m
ma
a
aiiilll::: ttte
e
eccch
h
hsssu
u
up
p
pp
p
po
o
orrrttt@
@
@L
L
La
a
attttttiiiccce
e
essse
e
em
m
miii...ccco
o
om
m
m
B
B
Bo
o
oa
a
arrrd
d
d R
R
Re
e
evvv
P
P
Prrro
o
ojjje
e
ecccttt
1
1
16
6
6---F
F
FE
E
EB
B
B---1
1
16
6
6
B
B
B
1
1
1...0
0
0
8
8
8
1
1
1
B
B
BL
L
LO
O
OC
C
CK
K
K D
D
Diiia
a
ag
g
grrra
a
am
m
m
L
L
LIIIF
F
FM
M
MD
D
D---6
6
60
0
00
0
00
0
0---6
6
6M
M
MG
G
G8
8
81
1
1III S
S
Sn
n
no
o
ow
w
w b
b
brrriiid
d
dg
g
giiin
n
ng
g
g ssso
o
olllu
u
utttiiio
o
on
n
n
B
B
B
