Kikusui DME1600, Manual

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34
DME1600
SCPI Status System
Status registers are defined in the same way by all SCPI equipment. The status system stores
three register groups, which have various equipment conditions. They are the status byte regis-
ter, the standard event register, and the questionable data register.
The status byte register collects and stores the high-level summary information that is
reported in other register groups. The figure below illustrates the SCPI status system. The
standard event register and the questionable data register are event registers. They are read-
only registers for reporting the states defined by the DME1600. Bits are latched in the event
registers. As long as an event bit is set, subsequent state changes will be ignored. The bits in
an event register are cleared automatically by commands (such as *ESR?,
STAT:QUES:EVEN?, and *CLS). The reset command (*RST) and the device clear command
do not clear the bits in the event registers. When you query an event register, the DME1600
returns a decimal value corresponding to the binary-weighted sum of all the bits set in the
register.
An enable register is readable and writable and can define which bits in the corresponding
event register are OR’ed together to generate a single summary bit. Querying an enable reg-
ister does not clear it. The *CLS command does not clear the enable registers, but it can clear
the bits in the event registers. The STATus:PRESet command clears the questionable data
register. To configure the bits in an enable register, you have to write a decimal value corre-
sponding to the binary-weighted sum of the bit configuration you want to set in the register.
SCPI status system
Binary Weights
2
0
= 1 2
4
= 16 2
8
= 256 2
12
= 4096
2
1
= 2 2
5
= 32 2
9
= 512 2
13
= 8192
2
2
= 4 2
6
= 64 2
10
= 1024 2
14
= 16384
2
3
= 8 2
7
= 128 2
11
= 2048 2
15
= 32768