PCIe/PXIe-5211 |
| 36
Figure 28 Two-Edge Seperation with Explicit Sample Clock
To configure the counter to work in this mode, set JY5211CITask.Mode to
CIMode.Finite or CIMode.Continuous
,
and set JY5211CITask.SampleClock.Source to
CISampleClockSource.Internal or CISampleClockSource.External.
3) Finite/Continuous Mode with Implicit Sample Clock
In implicit mode, the signal active edge as the implicit sample clock edge. The
counting values of rising edges of timebase between first signal and second signal
are stored into buffer on each rising edge of the first signal, as shown in Figure 29.
Figure 29 Two-Edge Seperation with Implicit Sample Clock
Summary of Contents for PCIe-5211
Page 9: ...PCIe PXIe 5211 jytek com 5 2 2 Digital IO Specifications Table 1 Digital IO Specifications...
Page 11: ...PCIe PXIe 5211 jytek com 7 2 4 Other Specifications Table 3 Other Specifications...
Page 12: ...PCIe PXIe 5211 jytek com 8 2 5 Front Panel and Pin Definition Figure 3 Front Pannel...
Page 13: ...PCIe PXIe 5211 jytek com 9 Table 4 Pin Defination...
Page 36: ...PCIe PXIe 5211 jytek com 32 Figure 24 Frequency Measure Values In Single Mode...