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4.5.4 EDO RASx# Wait State
This field specifies the Wait State of EDO DRAM row address line. This field is available only when
the Auto Configuration field is disabled.
Note:
This field is for experienced users only.
Options
Description
2 (*)
2 system clocks wait state for EDO row address line
1
1 system clock wait state for EDO row address line
4.5.5 SDRAM CAS Latency Time
This field specifies the SDRAM CAS latency timing parameter (the time from CAS# assertion to
data valid).
Note:
This field is for experienced users only.
Options
Description
2
2 system clocks
3 (*)
3 system clocks
4.5.6 DRAM Data Integrity Mode
When enabled, the BIOS will use ECC (Error Checking and Correcting) protocol to increase integrity
of system data. When ECC is selected, all memory modules used by the system must support ECC.
Options
ECC
Non-ECC (*)
4.5.7 System BIOS Cacheable
When enabled, accesses to the system BIOS will be cached.
Options
Enabled (*)
Disabled
4.5.8 Video BIOS Cacheable
When enabled, access to the video BIOS will be cached.
Options
Enabled
Disabled (*)
4.5.9 Video RAM Cacheable
When enabled, access to the video memory located at A0000H to BFFFFH will be cached.
Options
Enabled
Disabled (*)
Summary of Contents for BD100 Plus
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