iWave iW-RainboW-G22M, Hardware User'S Manual

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RZ/G1E SODIMM SOM Hardware User Guide
iWave Systems Technologies Pvt. Ltd.
2. ARCHITECTURE AND DESIGN
This section provides detailed information about the RZ/G1E SODIMM SOM features and Hardware architecture with
high level block diagram. Also, this section provides detailed information about SODIMM edge connector pin
assignment and usage.
2.1 RZ/G1E SODIMM SOM Block Diagram
CPU
RZ/G1E
DDR3 -512MB
(Upgradable)
SODIMM
PCB Edge
Connector
(200Pin)
DDR3 (32bit)
DBSC
iW-RainboW-G22M - RZ/G1E SODIMM SOM Block Diagram
USB1
USB Host x 1
SD (4bit) x 1
SDHI0
USB OTG x 1
USB0
eMMC - 8GB
(Upgradable)
MMC
MMC
Micro SD
Connector
(Optional)
SD (4bit)
SDHI1 4
100/1000Mbps
Ethernet PHY
EtherAVB
100Mbps
Ethernet PHY
(Optional)
EtherMAC/
VI1
RMII x 1
GMII x 1
100/1000Mbps
Ethernet
100Mbps
Ethernet
1
SPI Flash-16Mb
(Upgradable)
QSPI
QSPI
DU0
RGB LCD (24bpp) x 1
SSI3/
SSI4
I2S x 1
CAN0,
CAN1
CAN x 2
HSCIF1,
HSCIF2
3
UART (with CTS & RTS) x 2
SCIF1,SCIF2,
SCIF3,SCIF5
UART x 4
SCIF4
Debug UART
I2C3,
I2C5
I2C x 2
MSIOF0
MSIOF1
MSIOF2 SPI x 3
2
TPU0,TPU2,
TPU3
PWM x 3
On-Board
Regulators
Power to
Peripherals
3.3V
GPIOs
GPIOs
JTAG
JTAG
RTC Controller
VRTC
VRTC
I2C3
Camera (8bit) 1,2
¹ Since EtherMAC and VI1 are multiplexed in CPU, either one only can be used at a time. By default VI1 is supported.
2
Since VI1 and MSIOF1 are shared the same SODIMM Edge pins, either one only can be used at a time. By default VI1 is supported.
3 Since HSCIF2 interface is shared between Wi-Fi/BT and SODIMM Edge pins, either one only can be used at a time. By default Wi-Fi/BT module is supported.
4
Since SDHI1 interface is shared between Wi-Fi/BT module and µSD Connector, either one only can be used at a time. By default Wi-Fi/BT module is supported.
Voltage Level
Translator
JTAG
WiFi/BT
Module
HSCIF2 3
Figure 1: RZ/G1E SODIMM SOM Block Diagram