Open-Q™ 624A Development Kit
Open-Q™ 624A Development Kit User Kit
47
Pin # CAM0(J5)
CAM1(J4)
Description
23
MIPI_CSI0_CLK_N
MIPI_CSI1_CLK_N
Input. MIPI CSI0 / CSI1 clock
lane
24
MIPI_CSI0_CLK_P
MIPI_CSI1_CLK_P
Input. MIPI CSI0 / CSI1 clock
lane
25
GND
GND
Ground
26
MIPI_CSI0_LANE1_N
MIPI_CSI1_LANE1_N
Input. MIPI CSI0 / CSI1 data
lane 1
27
MIPI_CSI0_LANE1_P
MIPI_CSI1_LANE1_P
Input. MIPI CSI0 / CSI1 data
lane 1
28
GND
GND
Ground
29
MIPI_CSI0_LANE2_N
MIPI_CSI1_LANE2_N
Input. MIPI CSI0 / CSI1 data
lane 2
30
MIPI_CSI0_LANE2_P
MIPI_CSI1_LANE2_P
Input. MIPI CSI0 / CSI1 data
lane 2
31
GND
GND
Ground
32
MIPI_CSI0_LANE3_P
MIPI_CSI1_LANE3_P
Input. MIPI CSI0 / CSI1 data
lane 3
33
MIPI_CSI0_LANE3_N
MIPI_CSI1_LANE3_N
Input. MIPI CSI0 / CSI1 data
lane 3
34
GND
GND
Ground
35
GPIO_31_CCI_I2C_SDA1
(APQ_GPIO31)
GPIO_31_CCI_I2C_SDA1
(APQ_GPIO31)
Output / Input. Default use is for
camera CCI1 I2C data interface
36
GPIO_32_CCI_I2C_SCL1
(APQ_GPIO32)
GPIO_32_CCI_I2C_SCL1
(APQ_GPIO32)
Output. Default use is for
camera CCI1 I2C clock interface
37
CAM_IRQ
(APQ_GPIO12)
CAM_IRQ
(APQ_GPIO12) - Not
connected by Default
Input. CAM_IRQ signal
38
CAM0_MCLK3
(APQ_GPIO128)
CAM1_MCLKX_CONN
(APQ_GPIO28)
Output. Default use is for
camera master clock. Maximum
24MHz
39
MB_ELDO_CAM0_DVDD
MB_ELDO_CAM1_DVDD
Power output. +1.1V Default.
Maximum current 300mA.
Option to source from onboard
LDOs (1A max current) instead
of SOM LDO VREG_L2
40
MB_VREG_5P0
MB_VREG_5P0- Not
connected by Default
Power output. 5V Power supply.
Maximum 700mA
