Open-Q™ 624A Development Kit
Open-Q™ 624A Development Kit User Kit
43
Pin #
Signal
Description
J2[1]
GND
GND
J2[2]
VREG_L5_1P8
Power output. Connected to PM8953 VREG_L5 regulator. Default is
+1.8V. Maximum current 600mA (shared with other platform circuitry)
J2[3]
VREG_L10_3P0
Power output. Connected to PM8953 VREG_L5 regulator. Default is
+3.0V. Maximum current 150mA
J2[4]
V_LCD_BACKLIGHT_CONN
+12V DC Power Output
J2[5]
V_LCD_BACKLIGHT_CONN
J2[6]
PM_MPP_4_WLED_PWM_CTR
L
PWM output dimming control on external backlight driver (PM8953
MPP 4)
J2[7]
NC
No Connection
J2[8]
BLSPy_1_TS_I2C_SDA
BLSP3 Bit 1 - SPI3_CS / I2C3_SDA (APQ_GPIO_10)
J2[9]
NC
No Connection
J2[10] BLSPy_2_UART_RX
BLSP3 Bit 2 - SPI3_MISO (APQ_GPIO_9)
J2[11] BLSPy_0_TS_I2C_SCL
BLSP3 Bit 0 - SPI3_CLK / I2C3_SCL (APQ_GPIO_11)
J2[12] VREG_L6_1P8
Power output. Connected to PM8953 VREG_L6 regulator. Default is
+1.8V. Maximum current 300mA (shared with other platform circuitry)
J2[13] BLSPy_3_UART_TX
BLSP3 Bit 3 - SPI3_MOSI (APQ_GPIO_8)
J2[14] TS_INT_N
Input, Touchscreen Interrupt (APQ_GPIO_65)
J2[15] BACKLIGHT_EN_CONN
Output, Backlight Enable (APQ_GPIO_100)
J2[16] DISP_MDP_VSYNC_P
Output, SDE vertical sync – primary (APQ_GPIO_24)
J2[17] NC
No Connection
J2[18] NC
No Connection
J2[19] DISP_MDP_VSYNC_S
Output, SDE vertical sync – secondary (APQ_GPIO_25)
J2[20] NC
No Connection
J2[21] NC
No Connection
J2[22] TS0_RESET_N
Output, Touchscreen Reset (APQ_GPIO_64)
J2[23] NC
No Connection
J2[24] WLED_CABC_DISP
PWM input for dynamic dimming (Content Adaptive Backlight Control)
J2[25] GND
GND
