Open-Q™ 624A Development Kit
Open-Q™ 624A Development Kit User Kit
44
Pin #
Signal
Description
J2[26] VOUT_WLED_DISP
Backlight LED Voltage Output
J2[27] WLED_SINK1_DISP
Backlight LED String 1 Current Sink. Max 30mA
J2[28] GND
GND
J2[29] WLED_SINK2_DISP
Backlight LED String 2 Current Sink. Max 30mA
J2[30] WLED_SINK3_DISP
Backlight LED String 3 Current Sink. Max 30mA
J2[31] GND
GND
J2[32] WLED_SINK4_DISP
Backlight LED String 4 Current Sink. Max 30mA
J2[33] MB_VREG_3P3_DISP
+3.0V Power output. Maximum current 150mA
J2[34] GND
GND
J2[35] VREG_DISP_5V_P_DISP
Display Bias, Positive. D5.5V
J2[36] VREG_DISP_5V_N_DISP
Display Bias,Negative. Default -5.5V
J2[37] GND
GND
J2[38] MIPI_DSI0_DATA3_CONN_N
MIPI DSI Data Channel 3 Output Negative Lane
J2[39] MIPI_DSI0_DATA3_CONN_P
MIPI DSI Data Channel 3 Output Positive Lane
J2[40] GND
GND
J2[41] MIPI_DSI0_DATA2_CONN_N
MIPI DSI Data Channel 2 Output Negative Lane
J2[42] MIPI_DSI0_DATA2_CONN_P
MIPI DSI Data Channel 2 Output Positive Lane
J2[43] GND
GND
J2[44] MIPI_DSI0_DATA1_CONN_N
MIPI DSI Data Channel 1 Output Negative Lane
J2[45] MIPI_DSI0_DATA1_CONN_P
MIPI DSI Data Channel 1 Output Positive Lane
J2[46] LCD_RESET_N
Output, LCD Reset (APQ_GPIO_61)
J2[47] MIPI_DSI0_DATA0_CONN_P
MIPI DSI Data Channel 0 Output Positive Lane
J2[48] MIPI_DSI0_DATA0_CONN_N
MIPI DSI Data Channel 0 Output Negative Lane
J2[49] DISPLAY_GP2_GND
Connected to GND by default
J2[50] MIPI_DSI0_CLK_CONN_P
MIPI DSI Clock Output Positive Lane
J2[51] MIPI_DSI0_CLK_CONN_N
MIPI DSI Clock Output Negative Lane