Datasheet
25
Electrical Specifications
NOTES:
1.
Unless otherwise noted, all specifications in this table apply to all processor frequencies.
2.
V
IL
is defined as the voltage range at a receiving agent that will be interpreted as a logical
low value.
3.
V
IH
is defined as the voltage range at a receiving agent that will be interpreted as a logical
high value.
4.
V
IH
and V
OH
may experience excursions above V
TT
. However, input signal drivers must
comply with the signal quality specifications in
Chapter 3
.
5.
Refer to processor I/O Buffer Models for I/V characteristics.
6.
The V
TT
referred to in these specifications is the instantaneous V
TT
.
7.
Leakage to V
SS
with land held at V
TT
.
8.
Leakage to V
TT
with land held at 300mV.
NOTES:
1.
Unless otherwise noted, all specifications in this table apply to all processor frequencies.
2.
Measured at V
TT
* 0.2V.
3.
For Vin between 0 and V
OH
.
NOTES:
1.
Unless otherwise noted, all specifications in this table apply to all processor frequencies.
2.
All outputs are open drain.
I
LI
Input Leakage
Current
N/A
± 100
µA
7
I
LO
Output Leakage
Current
N/A
± 100
µA
8
R
ON
Buffer On Resistance
7.49
9.16
Ω
5
Table 2-9.
GTL+ Signal Group DC Specifications
Symbol
Parameter
Min
Max
Unit
Notes
1
Table 2-10. Open Drain and TAP Output Signal Group DC Specifications
Symbol
Parameter
Min
Max
Unit
Notes
1
V
OL
Output Low Voltage
0
0.20
V
-
I
OL
Output Low Current
16
50
mA
2
I
LO
Output Leakage Current
N/A
± 200
µA
3
Table 2-11. CMOS Signal Group DC Specifications
Symbol
Parameter
Min
Max
Unit
Notes
1
V
IL
Input Low Voltage
-0.10
V
TT
* 0.30
V
3, 6
V
IH
Input High Voltage
V
TT
* 0.70
V
TT
+ 0.10
V
4, 5, 6
V
OL
Output Low Voltage
-0.10
V
TT
* 0.10
V
6
V
OH
Output High Voltage
0.90 * V
TT
V
TT
+ 0.10
V
2, 5, 6
I
OL
Output Low Current
V
TT
* 0.10 /
67
V
TT
* 0.10 /
27
A
6, 7
I
OH
Output Low Current
V
TT
* 0.10 /
67
V
TT
* 0.10 /
27
A
6, 7
I
LI
Input Leakage Current
N/A
± 100
µA
8
I
LO
Output Leakage Current
N/A
± 100
µA
9