Functional Architecture
Intel® Server Board X38ML
Revision
1.3
Intel order number E15331-006
16
(DIMM A1 and DIMM A2) and Channel B representing the Channel B DIMMs (DIMM B1 and
DIMM B2). They are placed in a row and numbered as DIMM A1/DIMM A2/DIMM B1/DIMM B2
with DIMM A1 the closest to the MCH.
Memory population rules:
If dual-channel operation is desired, Channel A and Channel B must be populated
identically (for example, same capacity)
Use DDR2 667/800 only
The speed used on all the channels is the slowest DIMM in the system
Use ECC or non-ECC DIMMs
User can mix different memory technologies (size and density)
For single-channel mode, either channel may be used and DIMM sockets within the
same channel can be populated in any order
For dual-channel interleaved mode, DIMM sockets may be populated in any order as
long as the total memory in each channel is the same.
For dual-channel asymmetric mode, DIMM sockets may be populated in any order.
3.5
I/O Subsystem
3.5.1
PCI Express* x16 Riser Slot
The server board provides a PCI Express* x16 riser slot that is resourced with a PCI Express*
x16 interface from MCH and supports PCI Express* x16 graphics.
3.5.2
SATA Support
The server board provides four SATA II ports by the integrated SATA controller of the Intel
®
ICH9-R. The SATA controller supports data transfer rates of up to 300 MB/sec and provides two
modes of operation: a legacy mode using I/O space and an Advanced Host Controller Interface
(AHCI) mode using memory space.
3.5.2.1
SATA RAID
Intel
®
Embedded Server RAID Technology, available with the CH9R, supports four Serial ATA
ports, providing a cost-effective way to achieve higher transfer rates and reliability. Intel
®
Embedded Server RAID Technology supports:
RAID level 0 data striping for improved performance
RAID level 1 data mirroring for improved data reliability
RAID level 10 data striping and mirroring for high data transfer rates and data
redundancy
