Functional Architecture
Intel® Server Board X38ML
Revision
1.3
Intel order number E15331-006
18
baseboard. One 10-pin internal on-board header is provided which is capable of supporting two
additional USB 2.0 ports.
3.5.6
Super I/O Chip
The Super I/O chip integrated into the Integrated BMC provides legacy I/O support. The Super
I/O chip contains the necessary circuitry to support two serial ports and hardware
control/monitor functions. The server board implements the following features:
Two fully functional serial ports, compatible with the 16C550
Up to 16 shared GPIO ports
Programmable wake-up event support
Plug and play register set
Power supply control
Watchdog timer compliant with Microsoft SHDG*
LPC to SPI bridge for system BIOS support
Real-time clock module with the external RTC interface
3.5.6.1
Serial Ports
The board provides two serial ports. Serial A is a standard DB-9 interface located at the rear I/O
panel of the server board next to the video connector. The reference designator is J5A1. Serial
B is a 3-pin header interface located near the CMOS battery. The reference designator is J4C1.
Table 2. Serial A Header Pin-out
Pin
Signal Name
Serial Port A Header Pin-out
1 DCD
2 RXD
3 TXD
4 DTR
5 GND
6 DSR
7 RTS
8 CTS
9 RI
