Intel® SRMK2 Internet Server Technical Product Specification
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7.3.9 POST Memory Manager Support
The BIOS supports revision 1.0 of the POST Memory Manager (PMM) specification. This
specification allows external clients, such as option ROMs, to request memory buffer during
initialization and release it later. Without the PMM, the option ROMs may overwrite buffers used
by the system BIOS or another client. Check with your plug-in card vendor to make sure their
PCI or ISA option ROM is PMM compliant. Being PMM compliant ensures that the plug in
cards will not cause system hangs or memory conflicts during post initialization of Option ROMs.
7.3.10 ACPI Support
The SRMK2 BIOS supports the
Advanced Configuration and Power Interface Specification
,
Revision 1.0. The primary role of the ACPI BIOS is to supply the ACPI Tables. POST initializes
the ACPI tables and relocates them to extended memory. INT 15h, function E820 reports
memory, which is used by the ACPI BIOS as reserved. An ACPI aware OS causes an SMI if
the system is to be switched into ACPI mode. The system returns to legacy mode on hard reset
or power-on reset.
There are three runtime components to ACPI:
•
ACPI Tables - These tables describe the interfaces to the hardware. ACPI
Tables can make use of a p-code type of language, the interpretation of which is
performed by the OS. That is, the OS contains and uses an AML interpreter that
executes procedures encoded in AML and stored in the ACPI tables; ACPI
Machine Language (AML) is a compact, tokenized, abstract kind of machine
language. The tables contain information about power management capabilities of
the system, APIC information, and bus structure. The tables also describe control
methods that operating system uses to change PCI interrupt routing, enable/disable
devices in Super I/O, and find out the cause of the wake event.
•
ACPI Registers - The constrained part of the hardware interface, described (at
least in location) by the ACPI Tables.
•
ACPI BIOS - The code that boots the machine and implements interfaces for sleep,
wake, and some restart operations. The ACPI Description Tables are also
provided by the ACPI BIOS.
The SRMK2 platform supports states S0, S1, S4 and S5. Different sleep states are defined in the
ACPI specification. While entering S4 state, the operating system saves the context to the disk
and most of the system is powered off. The system can wake up from such a state on front panel
input, or a magic packet received by a Wake on LAN compliant LAN card, modem ring or RTC
alarm. The BIOS performs a complete POST upon wake up from S4, and initializes the platform.
The BIOS is not responsible for enabling Wake on LAN functionality in add-in cards. The WOL
enable bit is typically located in the SEEPROM on the network card, and the user must use the
configuration utilities that are shipped with the network card to set up the card in the correct
mode. The RTC alarm is set up in the standard CMOS locations from 0 to 0Ch of the RTC ram.
S1: The BIOS will set up the ACPI tables for CPU sleep halt capability only. No context will be
lost in this state and the CPU caches will maintain coherency.
S4: Hibernate or Save to disk. The BIOS will set up the ACPI tables and AML code to store
memory and the machine state to disk. All context is saved to the disk before the system reverts
to the soft off state (S5). Upon a power button press or wakeup event the system will restore
