Intel® SRMK2 Internet Server Technical Product Specification
35
+12V
+12V
N/A
D1+/D1-
CPU 0 Thermistor
CPU 1 Thermistor
For more details on accessing the Heceta registers please refer to the ADM1024 data sheet from
Analog Devices.
3.13 Wake on Ring and Resume on Ring
The SRMK2 baseboard provides three methods for implementing Wake on Ring (WOR). An
external modem connected to the serial port can toggle the super I/O controller’s Ring Indicator
pin which should be enabled to cause a wakeup event. The WOR output of an internal modem
card may be connected to an internal 2-pin WOR header (J11) to cause a wakeup event. Finally,
a PCI modem may implement a WOR circuit that uses PCI PME# to cause a wakeup event.
This section describes two technologies that enable telephony devices to access the computer
when it is in a power-managed state. The method used depends on the type of telephony device
(external or internal) and the power management mode being used (APM or ACPI).
/
NOTE
Wake on Ring and Resume on Ring technologies require the support of an operating system that
provides full ACPI functionality.
3.13.1 Wake on Ring
The operation of Wake on Ring can be summarized as follows:
•
Powers up the computer from either the APM soft-off mode or the ACPI S5 state
•
Detects incoming calls differently for external and internal modems:
−
For external modems, the serverboard hardware monitors the Ring Indicator (RI)
input of the serial port.
−
For internal modems, a cable must be routed from the modem to the Wake on Ring
connector
3.13.2 Resume on Ring
The operation of Resume on Ring can be summarized as follows:
•
Resumes operation from either the APM sleep mode or the ACPI S1 to S4 state
•
Detects incoming calls similarly for external and internal modems; does not use the
Wake on Ring connector.
•
Requires that modem interrupt be unmasked for correct operation.
3.14 Speaker
A 47
Ω
inductive speaker is mounted on the motherboard. The speaker provides audible error
code (beep code) information during the power-on self test (POST).