Intel SR1690WB - Server System - 0 MB RAM, Service Manual

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74 Intel
®
Server System SR1690WB Service Guide
•
Upper nibble bits = 1010b = Ah; Lower nibble bits = 1100b = Ch; the two are
concatenated as ACh.
8h 4h 2h 1h 8h 4h 2h 1h
Status ON OFF ON OFF ON OFF ON OFF
Results 1 0 1 0 1 1 0 0
Ah Ch
Table 9. POST Progress Code LED Example
Table 10. Diagnostic LED POST Code Decoder
Diagnostic LED Decoder
Checkpoint 1 = On, 0= Off Description
Upper Nibble Lower Nibble
MSB LSB
8h 4h 2h 1h 8h 4h 2h 1h
LED #7 #6 #5 #4 #3 #2 #1 #0
Host Processor
0x10h 0 0 0 1 0 0 0 0 Power-on initialization of
the host processor
(bootstrap processor)
0x11h 0 0 0 1 0 0 0 1 Host processor cache
initialization (including AP)
0x12h 0 0 0 1 0 0 1 0 Starting application
processor initialization
0x13h 0 0 0 1 0 0 1 1 SMM initialization
0x14h 0 0 0 1 0 1 0 0 Selection of Processor
with least feature use as
Boot Strap Processor
0x15h 0 0 0 1 0 1 0 1 Switch an AP processor to
become the new Boot
Strap Processor
Chipset
0x21h 0 0 1 0 0 0 1 0 Initializing a chipset
component
Memory