Core™ 2 Duo Mobile Processors—Package Information
Intel® Core™ 2 Duo Mobile Processors on 45-nm process-Thermal Design Guide
TDG
June 2008
9
Order Number: 320028-001
2.0
Package Information
The Intel® Core™2 Duo Processor (XE and SV) is available in 478-pin Micro-FCPGA packages as well
as 479-ball Micro-FCBGA packages. The Intel® Core™2 Duo Processor SFF processor (LV and ULV) is
available in 956-ball Micro-FCBGA packages. The package mechanical dimensions can be found in the
product’s datasheet.
The Micro-FCBGA package incorporates land-side capacitors. The land-side capacitors are electrically
conductive. Care should be taken to prevent the capacitors from contacting any other electrically
conductive materials. Doing so may short the capacitors and possibly damage the device or render it
inactive.
The processor package has mechanical load limits that are specified in the processor datasheet. These
load limits should not be exceeded during heatsink installation, removal, mechanical stress testing, or
standard shipping conditions. The heatsink mass can also add additional dynamic compressive load to
the package during a mechanical shock event. Amplification factors due to the impact force during
shock must be taken into account in dynamic load calculations. The total combination of dynamic and
static compressive load should not then exceed the processor datasheet compressive dynamic load
specification during a vertical shock. It is not recommended to use any portion of the processor
substrate as a mechanical reference or load bearing surface in either static or dynamic compressive
load conditions.
