Introduction
R
Intel
®
848P Chipset Thermal Design Guide
7
1 Introduction
As the complexity of computer systems increase, so do power dissipation requirements. The
additional power of next generation systems must be properly dissipated. Heat can be dissipated
using improved system cooling, selective use of ducting, and/or passive heatsinks.
The objective of thermal management is to ensure that the temperatures of all components in a
system are maintained within functional limits. The functional temperature limit is the range within
which the electrical circuits can be expected to meet specified performance requirements. Operation
outside the functional limit can degrade system performance, cause logic errors, or cause component
and/or system damage. Temperatures exceeding the maximum operating limits may result in
irreversible changes in the operating characteristics of the component. The goal of this document is
to provide an understanding of the operating limits of the Intel
®
848P chipset Memory Controller
Hub (82848P MCH), and discuss a reference thermal solution.
The simplest and most cost-effective method is to improve the inherent system cooling
characteristics of the MCH through careful design and placement of fans, vents, and ducts. When
additional cooling is required, component thermal solutions may be implemented in conjunction with
system thermal solutions. The size of the fan or heatsink can be varied to balance size and space
constraints with acoustic noise.
This document presents the conditions and requirements to properly design a cooling solution for
systems that implement the 848P chipset. Properly designed solutions provide adequate cooling to
maintain the chipset MCH case temperature at or below thermal specifications. This is accomplished
by providing a low local-ambient temperature, ensuring adequate local airflow, and minimizing the
case to local-ambient thermal resistance. By maintaining the MCH case temperature at or below
those recommended in this document, a system designer can ensure the proper functionality,
performance, and reliability of this chipset.
1.1 Terminology
Term Description
BGA
Ball Grid Array. A package type defined by a resin-fiber substrate where a die is mounted,
bonded, and encapsulated in molding compound. The primary electrical interface is an array
of solder balls attached to the substrate opposite the die and molding compound.
FC-BGA
Flip Chip Ball Grid Array. A package type defined by a plastic substrate where a die is
mounted using an underfill C4 (Controlled Collapse Chip Connection) attach style. The
primary electrical interface is an array of solder balls attached to the substrate opposite the
die. Note that the device arrives at the customer with solder balls attached.
Intel
®
ICH5
Intel
®
I/O Controller Hub 5. The chipset component that contains the primary PCI interface,
LPC interface, USB, ATA, and/or other legacy functions.
MBGA
Mini Ball Grid Array. A smaller version of the BGA with a ball pitch of 1.00 mm [0.039 in].
MCH
Memory Controller Hub. The chipset component that contains the processor and memory
interface.
