Intel 520J - Pentium 4 2.80GHz 800MHz 1MB Socket 775 CPU, Datasheet

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Datasheet 19
Electrical Specifications
2.4.1 Phase Lock Loop (PLL) Power and Filter
V
CCA
and V
CCIOPLL
are power sources required by the PLL clock generators for the Pentium 4
processor in the 775-land package. Since these PLLs are analog, they require low noise power
supplies for minimum jitter. Jitter is detrimental to the system: it degrades external I/O timings as
well as internal core timings (i.e., maximum frequency). To prevent this degradation, these supplies
must be low pass filtered from V
TT
.
The AC low-pass requirements, with input at V
TT
are as follows:
•
< 0.2 dB gain in pass band
•
< 0.5 dB attenuation in pass band < 1 Hz
•
> 34 dB attenuation from 1 MHz to 66 MHz
•
> 28 dB attenuation from 66 MHz to core frequency
The filter requirements are illustrated in Figure 2-1 .
.
NOTES:
1. Diagram not to scale.
2. No specification exists for frequencies beyond fcore (core frequency).
3. fpeak, if existent, should be less than 0.05 MHz.
Figure 2-1. Phase Lock Loop (PLL) Filter Requirements
0 dB
–28 dB
–34 dB
0.2 dB
–0.5 dB
1 MHz 66 MHz fcore fpeak 1 Hz DC
Passband
High
Frequency
Band
Filter_Spec
Forbidden
Zone
Forbidden
Zone