Datasheet
73
Land Listing and Signal Descriptions
§
VID[5:0]
Output
VID[5:0] (Voltage ID) signals are used to support automatic selection of power
supply voltages (V
CC
). These are open drain signals that are driven by the
processor and must be pulled up on the motherboard. Refer to the
Voltage
Regulator-Down (VRD) 10.1 Design Guide for Desktop Socket 775
for more
information. The voltage supply for these signals must be valid before the VR
can supply V
CC
to the processor. Conversely, the VR output must be disabled
until the voltage supply for the VID signals becomes valid. The VID signals are
needed to support the processor voltage specification variations. See
for definitions of these signals. The VR must supply the voltage that is
requested by the signals, or disable itself.
VSS
Input
VSS are the ground pins for the processor and should be connected to the
system ground plane.
VSSA
Input
VSSA is the isolated ground for internal PLLs.
VSS_SENSE
Output
VSS_SENSE is an isolated low impedance connection to processor core V
SS
. It
can be used to sense or measure ground near the silicon with little noise.
VSS_MB_
REGULATION
Output
This land is provided as a voltage regulator feedback sense point for V
SS
. It is
connected internally in the processor package to the sense point land V27 as
described in the
Voltage Regulator-Down (VRD) 10.1 Design Guide for Desktop
Socket 775
.
VTT
Miscellaneous voltage supply.
VTT_OUT_LEFT
VTT_OUT_RIGHT
Output
The VTT_OUT_LEFT and VTT_OUT_RIGHT signals are included to provide a
voltage supply for some signals that require termination to V
TT
on the
motherboard.
For future processor compatibility some signals are required to be pulled up to
VTT_OUT_LEFT or VTT_OUT_RIGHT. Refer to the following table for the
signals that should be pulled up to VTT_OUT_LEFT and VTT_OUT_RIGHT.
VTT_SEL
Output
The VTT_SEL signal is used to select the correct V
TT
voltage level for the
processor.
VTTPWRGD
Input
The processor requires this input to determine that the V
TT
voltages are stable
and within specification.
Table 4-3. Signal Description (Sheet 8 of 8)
Name
Type
Description
Pull-up Signal
Signals to be Pulled Up
VTT_OUT_RIGHT
VTT_PWRGOOD, VID[5:0], GTLREF, TMS, TDI,
TDO, BPM[5:0], other VRD components
VTT_OUT_LEFT
RESET#, BR0#, PWRGOOD, TESTHI1, TESTHI8,
TESTHI9, TESTHI10, TESTHI11, TESTHI12
Summary of Contents for 520J - Pentium 4 2.80GHz 800MHz 1MB Socket 775 CPU
Page 8: ...8 Datasheet Contents...
Page 10: ...10 Datasheet Contents...
Page 14: ...14 Datasheet Introduction...
Page 36: ...36 Datasheet Package Mechanical Specifications Figure 3 2 Processor Package Drawing 1...
Page 37: ...Datasheet 37 Package Mechanical Specifications Figure 3 3 Processor Package Drawing 2...
Page 38: ...38 Datasheet Package Mechanical Specifications Figure 3 4 Processor Package Drawing 3...
Page 74: ...74 Datasheet Land Listing and Signal Descriptions...
Page 84: ...84 Datasheet Thermal Specifications and Design Considerations...