Processor Configuration Registers
248
Datasheet, Volume 2
2.18.30 FRCDH_REG—Fault Recording High Register
This register records fault information when primary fault logging is active. Hardware
reports the number and location of fault recording registers through the Capability
register. This register is relevant only for primary fault logging.
This register is sticky and can be cleared only through power good reset or by software
clearing the RW1C fields by writing a 1.
B/D/F/Type:
0/0/0/GFXVTBAR
Address Offset:
208–20Fh
Reset Value:
0000000000000000h
Access:
RO, RW1CS, ROS-V
Size:
64 bits
BIOS Optimal Default
0000000000000000h
Bit
Attr
Reset
Value
RST/
PWR
Description
63
RW1C
S
0b
Powerg
ood
Fault (F)
Hardware sets this bit to indicate a fault is logged in this Fault
Recording register. The F field is set by hardware after the details
of the fault is recorded in other fields.
When this bit is set, hardware may collapse additional faults from
the same source-id (SID).
Software writes the value read from this field to clear it.
62
ROS-V
0b
Powerg
ood
Type (T)
Type of the faulted request:
0 = Write request
1 = Read request or AtomicOp request
This field is relevant only when the F field is Set, and when the
fault reason (FR) indicates one of the DMA-remapping fault
conditions.
61:60
RO
00b
Uncore
Address Type (AT)
This field captures the AT field from the faulted DMA request.
Hardware implementations not supporting Device-IOTLBs (DI field
clear in Extended Capability register) treat this field as RsvdZ.
When supported, this field is valid only when the F bit is set, and
when the fault reason (FR) indicates one of the DMA-remapping
fault conditions.
59:40
RO
0h
Reserved
39:32
ROS-V
00h
Powerg
ood
Fault Reason (FR)
This field is relevant only when the F bit is set.
31:16
RO
0h
Reserved
15:0
ROS-V
000000000
0000000b
Powerg
ood
Source Identifier (SID)
Requester-id associated with the fault condition.
This field is relevant only when the F bit is set.
