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TB-KU-xxx-ACDC8K Hardware User Manual
55
Rev. 1.03
7.4.5. FMC HPC 4 (J11)
This FMC connects GTH lanes and 6 differential pairs of LA signals to banks on the FPGA.
High Speed:
Quad 228(XCKU060) / Quad 228 and 229(XCKU085):
4 GTH lanes (XCKU060) / 8 GTH lanes (XCKU085)
2 differential clock pairs
Low Speed:
Bank 44:
6 differential LA pairs