TB-KU-xxx-ACDC8K Hardware User Manual
21
Rev. 1.03
7.1.6. Board Power Button
This board features a power button rocker switch on the chassis
’ front panel along with 4 SFP+
connectors, a micro USB port and a green and red LED to signal the FPGA programming and idle states.
The power sequencer monitors the rocker switch power button which disables power supplies on the
board when turned off.
The “I” position turns ON the power supplies and the “O” position turns them OFF.
The FPGA’s fan however will be active as long as the 12V supply is live.
Figure 7-5 Board Power Button
7.1.7. FPGA HR Bank Voltage Selection
Various different devices are connected on the FPGA HR banks. The FMC0 connector and SFP+
modules are connected to the FPGA’s HR 64 and 65 banks as shown in blue on this board’s block
diagram (Figure 4-1). The SPI flash components are connected to HR bank 0 and bank 65.
Banks 0, 64 and 65 have a selectable voltage which is identical on these three banks.
Table 7-3 HR Banks Connected Peripherals
Bank #
Connected Peripherals
Voltage
Dedicated Config 0
Dual Quad SPI Flash (Primary)
Selectable
1.8V, 2.5V,
3.3V
HR 64
FMC0,
SFP 1 and 2
HR 65
FMC0,
Dual Quad SPI Flash (Secondary),
SFP 3 and 4
7.1.8. HR Banks Voltage and SFP+ RX_LOS/TX_FAULT Selection
The 3V3_VCC_HR power can be selected through the use of a 3-pin jumper (J44).
The user can also select between RX_LOS or TX_FAULT on each of the 4 SFP+ modules.
Table 7-4 HR Banks Voltage and RX_LOS/TX_FAULT Selection
Jumper No.
Description
Status
Function
J44
HR Banks Voltage
Select
No Jumper
1.8V (Default)
1-2
2.5V
3-2
3.3V
