Infineon OPTIREG TLF30681QVS01, Manual

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8.3 State transitions and trigger signals
This section describes the state transitions of the integrated state machine.
Table 24 shows the static state transitions with the respective source and destination states, the condition
required to trigger the state transition and a transition specific action executed during the transition.
Each row refers to one state transition. With multiple conditions in the same row all of the conditions must be
met.
Table 24 State transitions
Source Destination Condition Action
Unpowered ACTIVE Device supplied
First POR event –
ACTIVE DISABLED SPI command and ENA =
"low"
–
ACTIVE LOCKED SPI command and
ENA_CONFIG = 0
–
ACTIVE FAULT Hard reset fault detected –
DISABLED ACTIVE Enable event Generate MCU reset
FAULT ACTIVE FAULT timer expires Generate MCU reset
FAULT LOCKED
25)
Hard reset fault occurs
three times
–
LOCKED ACTIVE Enable event Generate MCU reset
Table 25 and Table 26 show the mapping between the fault events and the associated actions.
Table 25 Event response mapping – voltage rails
Event Move to
FAULT Move to
ACTIVE;
Generate RESET Move to
DISABLED No transition;
Generate interrupt
Buck1
Buck1: OV
X – – –
Buck1: UV – X – –
Buck1: StG X – – –
Buck2
Buck2: OV
X – – –
Buck2: UV – X – –
Buck2: StG X – – –
Boost1
Boost1: OV
X – – –
25
The ENA pin must either be configured as edge-triggered or the ENA pin must be "low" to trigger the
transition from FAULT to LOCKED state.
OPTIREG
™
PMIC TLF30681QVS01
Power management IC
State machine
Datasheet 81 Rev. 1.0
2020-04-08