Infineon OPTIREG TLF30681QVS01, Manual

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7.2 Serial peripheral interface (SPI)
7.2.1 SPI introduction
The serial peripheral interface (SPI) is a synchronous serial data link that operates in full duplex mode. The SDI
pin receives data from the microcontroller and the SDO pin transmits data to the microcontroller.
The device communicates in slave mode where the master, for example the microcontroller, provides a clock on
the SCL pin and initiates the data frame. The device is addressed via a dedicated chip select line (SCS pin).
Functional description SPI
The data on pin SDI is captured on the falling edge of the SPI clock signal (pin SCL) and shifted on the rising
edge of the SPI clock signal. The data on pin SDO is set on the falling edge of SPI clock signal (pin SCL) and
shifted on the rising edge of the SPI clock signal. The SPI master is to capture the data on the falling edge of the
SPI clock signal.
An SPI command consists of the following parts, see
Figure 9 :
• command bit CMD
• 6 address bits A0-A5
• 8 data bits D0-D7
• parity bit P
The SPI response for read operations consists of the following parts:
•
command bit CMD
• 6 status bits S0-S5
• 8 data bits D0-D7
• parity bit P
For a write operation, the data read on SDI is looped back via SDO.
A5 CMD
t
trail
t
lead
t
interframe
t
spi_clk
SCL
SCS
SDO (R)
SDI
t
max frame duration
A4 A3 A2 A1 A0 D7 D6 D5 D4 D3 D2 D1 D0 P P
A5 1'b1 A4 A3 A2 A1 A0 D7 D6 D5 D4 D3 D2 D1 D0 P P
SDO (W)
1'b0 1'b1 1'b0 1'b0 1'b0 1'b0 1'b0 D7 D6 D5 D4 D3 D2 D1 D0 P P
Figure 9 SPI frame format
The command bit in the SPI command is set to 1’b0 for a read and 1’b1 for a write operation. In the reply, the
command bit is always set to 1’b1.
The parity bit P is calculated from the 15 data bits of the SPI message consisting of the CMD bit, the 6 address
bits and the 8 data bits. The parity bit is set to ‘1’, if the number of ‘1’s in the data bits is odd, that is it is a XOR
function of the 15 data bits. The receiver of the SPI message should verify the parity bit prior to processing the
payload of the message.
The SPI performs several checks on the communication to ensure proper behavior:
OPTIREG
™
PMIC TLF30681QVS01
Power management IC
Microcontroller interface and supervisory functions
Datasheet 55 Rev. 1.0
2020-04-08