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RMV Operations Manual Revision Copyright illunis LLC, 2014

Page 123

10.3: Frame Grabber

Four Tap Readout

The picture below shows a configuration for a 4M camera in Four Tap Readout mode.   The Camera
Geometry is “Custom Configuration”.

The custom setting are shown set up in the Dialog box below.

Summary of Contents for RMV-11002

Page 1: ...Rugged Machine VisionAdvanced Digital Machine Vision Cameras Operations Manual 4 Tap Firmware Revision EF Release 3 12 2014 ...

Page 2: ...sible documentation for the RMV cameras and we will update this document with your feedback We welcome comments and criticism of this document This document covers the CCD versions of the RMV digital cameras A separate document will cover the CMOS versions of the RMV Please direct your comments to EMAIL info illunis com Specifications subject to change without notice ...

Page 3: ...fer state of the art products at the industries most competitive prices As a self funded company illunis is a stable reliable source for demanding OEM s who include the most pres tigious names in the world We in vite you to visit us and together we can create a prosperous future New Address Illunis LLC 14700 Excelsior Blvd Minnetonka MN USA Zip Code 55345 Phone 952 975 9203 Fax 952 294 8308 Intern...

Page 4: ...ensation Analog gain is fixed at the factory and a digital gain is provided for the user Digital gain DGO is from zero to 16 times and is performed in 12 bit resolution Analog and digital gain is performed independently for each sensor tap Functions are provided for common control of gains and offsets Data is output in the industry standard camera link format Camera communication initializes at 96...

Page 5: ...aster Slave mode This mode supports master slave configurations of cameras where the master camera runs AE IRIS and HEQ functions and transmits this data to the slave cameras This allows for large arrays of cameras to be configured and operated as a single imager Data is framed and error checked Histogram OSD Plot The RMV incorporates a 512 point histogram that can be viewed on screen Master Digit...

Page 6: ...F Micro Version EF 43 GigE Support Not Supported GigE interface is not fast enough to support 4 tap CCD Readout Special Notes 4 Tap Readout 4 Tap Readout in not four taps to the frame grabber The RMV camera outputs the CCD 4 taps on to CameraLink channels running at twice the speed of the CCD pixel clock Doing this allows the user to use a frame grabber in base mode One connector The user MUST be ...

Page 7: ...RMV Operations Manual Revision Copyright illunis LLC 2014 Page 7 Older Document Revisions ...

Page 8: ...es the support for the Data overlay function added to the rev E7 FPGA The Data overlay or DOSD functions allow for the insertion of binary data into the video image The data is inserted outside the normal active video area EEPROM User States This application note describes the multi USER EEPROM state mechanism in the RMV cameras Up to 4 USER states are available for storing customize camera parame...

Page 9: ...unis LLC 2014 Page 9 Table Of ContentsRugged Machine Vision Chapters 1 RMV Overview 2 Hardware 3 Software and GigE 4 Image Exposure 5 Image Processing 6 Image Detectors 7 On Screen Displays 8 Camera Link 9 Timing Tables 10 Frame Grabber 11 FAQ s ...

Page 10: ... your application The built in image detectors include tap boundary measure ment and active tap balancing logic to in sure that the two taps gain and offset match as close as possible 14 bit ADC s and data path with Tap Reorder The RMV supports full 14 bit signal sam pling and 12bit data paths throughout the signal processing path This insures that the maximum signal quality is preserved in the pr...

Page 11: ...ctors that meas ure brightness sharpness tap matching and signal to noise performance In addition the RMV has a frame counter and cross hair over lay for image center alignment Pixel Defect Correction All sensors have defects and the RMV includes a circuit to cor rect gross defects through replication or aver aging Look Up Table LUT The hardware LUT built into the ISP can translate any 12 bit pixe...

Page 12: ...0 uses the Truesence KAI 2020 sensor Here is a list of RMV camera names with the corresponding sensors Note all sensors supported are not listed in this table RMV Camera models Mega Pix Sensor Sensor Mfg Camera name 2 0 KAI 2150 Truesence RMV 2150 2 0 KAI 2170 Truesence RMV 2170 4 0 KAI 4050 Truesence RMV 4050 4 0 KAI 4070 Truesence RMV 4070 29 0 KAI 29050 Truesence RMV 29050 ...

Page 13: ...rame grabber When the camera is in single tap mode all sensor data is clocked out tap A Sensor data is clocked out of taps A and B in dual tap mode In four tap mode the data is clock out each tap For information on setting up the frame grabber see the frame grabber section of this document Top Black Rows Top Bufer Rows Bottom Buffer Rows Bottom Black Rows Left Black Left Buffer Left Dummy Right Bl...

Page 14: ...cordance with specifications for a period of one year from date of shipment This warranty does not cover failure due to those mechanical and electrical causes de fined below as liability of the customer If the device does not function properly dur ing the warranty period illunis will at it s option either repair or replace the unit In the case of replacement illunis reserves the right to re use th...

Page 15: ...ed wires to a receiver device that converts the data back into the original format For more information go to www national com lvds The Camera Link Cable is data only The CL cable does not include a pro vision for power to the camera Thus all CL cameras must have a separate power connector The RMV power connector has additional signals The Camera Link Cable includes communication The CL cable prov...

Page 16: ...nual Revision Copyright illunis LLC 2014 Page 16 Chapter 2 HardwareRugged Machine Vision 2 0 Hardware Overview 2 1 Case 2 2 CAD Models 2 3 Cables 2 3 1 Power Cable 2 3 2 Camera Link Cable 2 4 Considerations 2 5 Options ...

Page 17: ... PCB that contains the electronics need by the specific sen sor this is unique to each sensor A FPGA microprocessor PCB that contains the timing generator control processor and image processing hardware and the third PCB is the Power Communication board which generates the many voltages needed in the CCD image sensor drive circuits and contains the digital image data drive circuits The RMV case is...

Page 18: ...sions can be provided as a manufacturing drawings and as a solid model that can be imported into almost any CAD system For access to these drawings please contact illunis at www illunis com Phone 952 975 9203 or email info illunis com CAD Models supported are STEP IGES ProE native and many others 2 2 Hardware CAD Models ...

Page 19: ...d 12Vpower supply part numbers Digikey T806 P5P ND M ouser 552 PSA 18U 120 wires for 12Vand GND will be terminated in female banana receptacles redfor 12V black for GND cut DC barrel connector off pow er supply find out whichwireis positive andwhich is negative solder red banana receptacle to thepositivewire solder black bananareceptacle to the negative wire cover w ire receptcacle joints with hea...

Page 20: ...LED flashes when a frame is sent by the camera Power Connection Connector pin out from back view PIN 6 GND PIN 5 12V DC PIN 4 External Trigger In 3 3V LVTTL PIN 3 Strobe out 3 3V LVTTL PIN 2 RS232 RX PIN 1 RS232 TX Back View Camera Link INTERNAL ERROR RED POWER GREEN VSYNC GREEN TRIGMODE ORANGE 6 1 5 2 4 3 LED Status Conditions RED ORANGE GREEN Status off off blinking Normal no errors on off blink...

Page 21: ... P 4 5 Meter CLCP 5 0 P 5 0 Meter CLCP 7 0 P 7 0 Meter CLCP 10 P 10 Meter 3M Web www 3M com interconnects 14B26 SZLB 100 0LC 1 0 Meter 14B26 SZLB 200 0LC 2 0 Meter 14B26 SZLB 300 0LC 3 0 Meter 14B26 SZLB 450 0LC 4 5 Meter 14B26 SZLB 500 0LC 5 0 Meter 14B26 SZLB 700 0LC 7 0 Meter 14B26 SZLB A00 0LC 10 Meter B Thumbscrew shell kit NOT Recommended Camera Link Cables 3M Web www 3M com interconnects 14...

Page 22: ...interface The RMV camera contains many advanced circuits and performs at very high clock speeds and thus requires careful consideration for thermal cooling The camera should be used either with a lens and or a solid mechanical mount that acts as a heat sink Power Consumption The RMV camera was designed to be as small as possible and as such has a high energy density The various operating modes of ...

Page 23: ...4011 2048 x 2048 new version of the 4010 KAI 4021 2048 x 2048 new version of the 4020 KAI 11002 4004 x 2672 KAI 16000 4872 x 3248 Full Frame Sensor Options KAF 3200 2048 x 1536 Cable Options Cable with strobe output Basic Power Only Cable Lens Mounting Options Call for current solid models and drawings C Mount C Mount with 25mm filter mount F Mount desktop with 1 4 20 mount F Mount with flange for...

Page 24: ... a circuit that de serializes the camera link data provides this data as LVTTL and then re serializes the CL data for transmission to a capture card The CLR also provides an option to redirect the communications data from the capture card to a standard windows serial port The CLR is powered with 12VDC RS232 PC COM Port CC1 CC2 CC3 CC4 FVAL LVAL DVAL PCLK DA0 DA7 DB0 DB7 COM SELECT Camera Link Came...

Page 25: ...erview 3 1 Serial Interface 3 2 Command packets 3 3 Command Table 3 4 System Status 3 5 Baud Rate 3 6 Graphical User Interface 3 6 1 Main Dialog 3 6 2 Exposure and Modes 3 6 3 Camera Information 3 6 4 Detectors and Displays 3 6 5 Image Corrections 3 6 6 Modes and Status 3 6 7 Communication 3 6 8 Files 3 6 9 Command Calculator ...

Page 26: ...r negative acknowledge signal The communication path from frame grabber to the RMV is through the Camera Link cable The Camera Link committee has specified that devices connected must first communicate at 9600 baud This default baud rate is certainly very slow for devices such as the RMV camera The RMV has a selectable baud rate for faster communica tion speeds The RMV microprocessor is a flash pr...

Page 27: ...fef0 checksum lower byte of 0x100 0xfe 0xf0 0x12 Checksum of Command and Data checksum comandindex checksum data Example4 Command 0400 data 0x0001 0x100 0x04 0x00 0xFC 0x100 0x00 0x01 0xFF Checksum lower byte of 0xFC 0xFF 0xFB End Indicates the End of the frame Size 1 ascii character Value 125 Decimal ascii Ack Nack Positive acknowledge Negative acknowledge Size 1 ascii character Ack Value 33 Deci...

Page 28: ... 0x000a Trigger source External OEM 0x000b Trigger Overlap Exposure Enable 0x000c Trigger Overlap Exposure Disable 0x000d Double Trig Double Expos OEM 04 04 Mode Register write lines to 0428 and 0429 prior to binning M 0 Common both trigger and free run M 8 Free Run Only M 4 Trigger Only Write 0xM000 Bin enable 0xM001 TBD 0xM002 Disable bin 0xM003 Enable partial Scan 0xM004 Disable Partial Scan 0x...

Page 29: ...000 9600 0x0001 19200 0x0002 38400 0x0003 57600 0x0004 115200 04 0a Partial Scan Start Line R W 04 0b Partial Scan Stop Line R W 04 0c Micro BIT initiate Write 0x0000 Clear Bit Status Register 0x0001 PBIT 0x0002 IBIT 04 0d Bit Depth Write 0x0000 12 bit mode 0x0001 10 bit mode 0x0002 8 bit mode 0x0003 Enable bottom 8 bits 0x0004 Disable bottom 8 bits 04 0e Strobe Control Write 0x0000 negative strob...

Page 30: ... Tap A Crack 0x0001 Tap B 0x0002 AE Window 0x0003 AF Win 0x0004 SNR Left 0x0005 Right 0x0006 Cross hair 0x0007 AF Data 0x0008 AF Data Full Screen 0x0009 disable 04 1a Read Detectors Read 0x0000 Tap A Crack 0x0001 Tap B 0x0002 AE Window 0x0003 AF Win 0x0004 Left SNR Sum 0x0005 Left SNR Sum of Squares 0x0006 Left SNR of Samples 0x0007 Right SNR Sum 0x0008 Right SNR Sum of Squares 0x0009 Right SNR of...

Page 31: ...n R W 04 22 AE max exposure R W min erasure 04 23 AE min exposure R W max erasure 04 24 Common gain Digital R W 04 25 Free Run erasure R W 04 26 AE detector Read 04 27 System Registers write data to EEDATA 030c prior to calling Write 0x0004 Write TPW 0x0005 Write TRO Left Start 0x0006 Write TRO Right Start 0x0007 Write TRO Size 0x0008 Write LVAL Start 0x0009 Write LVAL Stop 0x000a Write FVAL Start...

Page 32: ... master gain 04 43 FFC load mode R W 0x0000 load from com port 0x0001 load from com port and save to EEPROM 0x0002 load from EEPROM 04 04 Mode Register W 0x0011 Enable FFC 0x0012 Disable FFC Camera Mode and Status 05 00 Camera mode status Read 0x0000 read mode register 1 0x0001 read mode register 2 0x0002 read mode register 3 0x0003 read mode register 4 0x0004 read mode register 5 0x000B read mode...

Page 33: ...ge before re moving power 03 03 Copy User to Factory Write Wait for acknowledge before re moving power 03 04 Save substrate DAC value Write Dummy data 03 05 Copy factory to all USER Write Warning This can take time 03 06 Copy USER to USER Write Top byte is SRC USER Bottom byte is DST USER 03 07 Set USER Write Copies USER to ACTIVE loads it and performs soft reset Bottom byte is USER 03 08 Number o...

Page 34: ...free run runs valid enabled no binning no partial scan no line or text displays no LUT no PDC no digital gain or offset no test pattern reset the LVAL and FVAL defaults AE detector counter set to small size enable strobe in free run mode Auto Tap Matcher off 04 D8 Checksum Mode Cleared on restart Write 0x0000 Checksum of data 0x0001 Checksum of command and data 04 D0 Power Up Write Resets camera a...

Page 35: ... is in the serial read buffer 0x12 0x04 Focus to Infinity Write 0x12 0x05 Focus to Zero Write 0x12 0x06 Focus Absolute Write Data Focus position 0x12 0x07 Position of Focus Write Information is in the serial read buffer 0x12 0x18 Focus Incremental Write Data signed incremental position change Positive number move focus to infinity Negative numbers move focus to zero 0x12 0x08 Focus Distance Write ...

Page 36: ...top 0x000c CCD Type 0x000d FPGA Revision 0x000e Read TPD 0x000f SNR Left 0x0010 SNR Right 0x0011 Crack detector position 0x0012 Read Exposure value low 0x0013 Read Exposure value hi 0x0014 Read CRC 07 00 Camera Parameters R 0x0000 Camera Model 0x0001 Camera Hardware rev 0x0002 Camera Serial Number 0x0003 Micro firmware rev 0x0004 FPGA major revision 0x0005 Sensor Serial Number 0x0006 Clock Rate 0x...

Page 37: ...0 gain mode 0 AE Mode Enabled Serial Commands Target Index Command R W Description 07 00 Camera Parameters R 0x0000 Camera Model 0x0001 Camera Hardware rev 0x0002 Camera Serial Number 0x0003 Micro firmware rev 0x0004 FPGA Timing Generator rev 0x0005 Sensor Serial Number 0x0006 Clock Rate 0x0007 FPGA sub revision 05 00 Camera mode and status registers R 0x0000 read mode register 1 0x0001 read mode ...

Page 38: ...r Status 1 on 0 off 3 Frame Line Clamp Mode 0 Line Clamp 1 Frame Clamp Not recommended 2 ASYNC RESET Enabled Allows triggered frames in Free Run Mode 1 LUT loaded OEM 0 OSD 2X Enabled Mode Register 3 Bit Name Description 15 SRC Over scan Adds 16 lines of over scan to the sensor readout 14 SRC Wave 13 SRC Average Averages data in smear reduction circuit 12 OSD Filled Plot 11 SRC Enable Smear Reduct...

Page 39: ...igger Bin Mode Register 5 Bit Name Description 15 AE Time base algoritm Always 1 for Rev E 14 Trigger Bayer Bin 13 FFC Table loaded 12 11 Show AF data full screen 10 Show AF Data 9 Show SNR Right Detector Window 8 Show SNR Left Detector Window 7 Show AF Detector Window Auto Focus detector window 6 Show AE Detector Window Auto Exposure detector window 5 Show Tap B Crack Detector Window Tap B is the...

Page 40: ...led 0 Option Board 1 Enabled Mode Register 7 Bit Name Description 15 14 13 12 11 10 9 8 7 TSE Mode 6 UART master enabled 5 UART slave enabled 4 Not Used 3 Histogram Equalization Enabled 2 AE Histogram Detector Enable 1 AE in IRIS mode 0 AE in gain mode Mode Register 8 Unused Mode Register 6 Bit Name Description 15 TPD SEL1 TPD Resolution 14 TPD SEL 0 13 BIN AVE 1 BIN1 0 average functions 00 none 0...

Page 41: ...tory EEPROM area 14 AE_ERR Error in auto exposure operation 13 V5_ERR 5V power supply is out of range 12 V12_ERR 12V power supply is out of range 11 VH_ERR High voltage power supply is out of range 10 VL_ERR Negative voltage power supply is out of range 9 TDE Frame Indicates which of the two TDE frames is being read out 8 DCM Locked DCM Digital Clock Manager 7 DCM Timeout 6 VSYNC Timeout 5 UART Er...

Page 42: ... 3 ADC D State Save Fail Error Condition 2 ADC C State Save Fail Error Condition 1 ADC B State Save Fail Error Condition 0 ADC A State Save Fail Error Condition Status Register 1 Bit Name Description 15 Factory EEPROM CRC Error 14 AE Error 13 V5 Error 12 V12 Error 11 VH Error 10 VL Error 9 TDE Frame 8 DCM Lock FPGA Digital Clock Manager is locked 7 DCM Timeout DCM Error 6 Vsync Timeout 5 UART Erro...

Page 43: ...Serdes Sync High if AFE Serdes is working Low is error 12 AFE A Serdes Sync High if AFE Serdes is working Low is error 11 AFE D LVAL Error AFE LVAL sync stream not detected ERROR 10 AFE C LVAL Error AFE LVAL sync stream not detected ERROR 9 AFE B LVAL Error AFE LVAL sync stream not detected ERROR 8 AFE A LVAL Error AFE LVAL sync stream not detected ERROR 7 Not Used 6 Not Used 5 Not Used 4 Not Used...

Page 44: ...e EEPROM baud rate is set the camera must be re powered to set the rate Serial Commands Target Index Command R W Description 04 09 Set Current Baud Rate W 0x0000 9600 0x0001 19200 0x0002 38400 0x0003 57600 0x0004 115200 04 D2 Set Camera Link Boot Baud Rate Requires reboot R W 0x0000 9600 0x0001 19200 0x0002 38400 0x0003 57600 0x0004 115200 04 D3 External Serial Boot Baud Rate Requires reboot R W 0...

Page 45: ...l of the cameras illunis has provided a graphical user interface GUI The GUI is a application C that consists of several windows menus and dialog boxes for each of the many features of the RMV camera The GUI is installed using a stand ard windows installer program available from the illunis web site The complete installation and operating instructions for the GUI program are included in the Quick ...

Page 46: ... 4 1 1 FRM 4 1 2 FRS 4 1 3 Set Free Run Exposure Time 4 2 Trigger Modes 4 2 1 TPE 4 2 2 TME 4 2 3 TDE 4 2 4 TOE 4 2 5 Set Trigger Exposure Time 4 2 6 Software Trigger 4 2 7 Trigger Sub Pulse Delay 4 3 ASYNC RESET 4 4 Partial Scan 4 5 Binning 4 6 Auto Exposure 4 6 1 Triggered AE 4 7 Strobe Output 4 8 Analog to Digital 4 8 1 Gain 4 8 2 Offset 4 8 4 Black Clamp ...

Page 47: ...ode array is erased and an exposure is made based on the value of the Triggered Pulse Delay TPD register When the exposure is complete the image is transferred from the Photo diodes to the CCD then read out of the CCD and passed to the camera link interface The cam era is reset and waits for another trigger signal to assert TME Triggered Manual Exposure This mode is a superset of the TPE mode and ...

Page 48: ...ious image the timing of the electronic shutter can only happen during the horizontal line blanking Thus the electronic exposure can only hap pen once every line This results in a free run exposure time resolution of one line time Now consider that the exposure of the new image starts at the first line of readout and continues until the electronic shutter signal is asserted The time of the electro...

Page 49: ... the elec tronic erasure pulse that is used to clear the photo diodes and begin exposing a new image This elec tronic erasure pulse requires 6 TPD time periods Thus the minimum TPD is 6 The TPD counter is then incremented using the special trigger clock 1 64th the pixel clock until the TPD counter is equal to the TPD register When the TPD counter equals the TPD register the image transfer and read...

Page 50: ...no effect on the trig gered image LUT LUT The look up tables can be used to apply a gamma function to a live preview and not to the triggered image This is desirable when a good looking live image is needed but the final image is heavy software processed and only raw image data is needed PDC Pixel Defect Correction The PDC circuit must be disabled in the binning modes BINNING Binning Horizontal an...

Page 51: ...iods 0x0001 16 clock periods 0x0002 64 clock periods 0x0003 1024 clock periods Quick FAQ s If your application requires very short exposures use the TPD clock divisor 4 If your application requires very long exposures use the TPD clock divisor 1024 Cameras previous to FPGA release E7 used a fixed TPD divisor of 64 Note that when using the TPD divisor 1024 the exposure time may be larger than the m...

Page 52: ... 03 Readout Mode Select W 0x0000 Free Run Exposure 02 02 Set Free Run ms W Set FR time in milliseconds 100 02 03 Set Free Run us W Set FR time in us 02 02 Get Free Run ms R Return actual time in milliseconds 100 02 03 Get Free Run us R Return actual time in us 0xFFFF to large Quick FAQ s FRM is sometimes called continuous mode In FRM the exposure and readout are overlapped FRM exposure is set in u...

Page 53: ... Note ASYNC reset will work Quick FAQ s FRS is used to sync free running cameras Cameras can be synced to one pixel clock period Any number of cameras can be synchronized The strobe signal can be used to determine frame timing The strobe signal can be found on the RMV power connector and is a 3 3V LVTTL signal FRS mode works with Auto exposure in rev E9 FVAL Trigger Synced by Trigger RMV Camera in...

Page 54: ...and This results in a maximum possible exposure of 655ms although the value is sen sor dependant Serial Commands Target Index Command R W Description 02 02 Set Free Run ms W Set FR time in milliseconds 100 02 03 Set Free Run us W Set FR time in us 02 02 Get Free Run ms R Return actual time in milliseconds 100 02 03 Get Free Run us R Return actual time in us 0xFFFF to large Quick FAQ s The strobe s...

Page 55: ...ory 02 00 Set Trigger ms W Set TR time in milliseconds 100 02 01 Set Trigger us W Set TR time in us 02 00 Get Trigger ms R Return actual time in milliseconds 100 02 01 Get Trigger us R Return actual time in us 0xFFFF to large 02 0E TPD resolution R W 0x0000 4 clock periods 0x0001 16 clock periods 0x0002 64 clock periods 0x0003 1024 clock periods Quick FAQ s Use the TPE mode to control exposure wit...

Page 56: ...7 to 0xFFFF 04 1B Transfer Pulse Width R 0x0004 TPW Preset at factory 02 00 Set Trigger ms W Set TR time in milliseconds 100 02 01 Set Trigger us W Set TR time in us 02 00 Get Trigger ms R Return actual time in milliseconds 100 02 01 Get Trigger us R Return actual time in us 0xFFFF to large 02 0E TPD resolution R W 0x0000 4 clock periods 0x0001 16 clock periods 0x0002 64 clock periods 0x0003 1024 ...

Page 57: ...07 to 0xFFFF 04 1B Transfer Pulse Width R 0x0004 TPW Preset at factory 02 00 Set Trigger ms W Set TR time in milliseconds 100 02 01 Set Trigger us W Set TR time in us 02 00 Get Trigger ms R Return actual time in milliseconds 100 02 01 Get Trigger us R Return actual time in us 0xFFFF to large 02 0E TPD resolution R W 0x0000 4 clock periods 0x0001 16 clock periods 0x0002 64 clock periods 0x0003 1024...

Page 58: ...Mode Select W 0x000b Trigger Overlap Exposure enable 04 03 Readout Mode Select W 0x000c Trigger Overlap Exposure disable 02 04 Transfer Pulse Delay R W 0x0007 to 0xFFFF 04 1B Transfer Pulse Width R 0x0004 TPW Preset at factory 02 00 Set Trigger ms W Set TR time in milliseconds 100 02 01 Set Trigger us W Set TR time in us 02 00 Get Trigger ms R Return actual time in milliseconds 100 02 01 Get Trigg...

Page 59: ... is set by the physics of the photodiode transfer to vertical CCD clock sequence The electronics can be set for any exposure downto zero Maximum exposure time is set by the TPD period and the maximum TPD register value 65535 4 2 6 Exposure Trigger Modes Software Controlled Trigger This command forces an internal trigger from a software command The soft trigger pulse has a width in us as specified ...

Page 60: ...triggered exposure Quick FAQ s Use the TSUBD with applications that have very tight timing and very bright flash exposures The TSUBD time units are the same as TPD The substrate pulse is used to erase the photo diodes for the beginning of exposure The default for normal operation of TSUBD is a register value of 0x0001 TheTSUBD must be zero for TME mode to function Normal Triggered Image This scope...

Page 61: ...uick FAQ s Some camera manufactures call their trigger mode Async reset as they do not have different trigger and free run timing If the Async Reset mode is active in free run mode then the Free Run Synchronize mode is active The camera will sync to the trigger signal The RUN VALS option controls the output of FVAL and LVAL during async reset mode Async Reset mode and Runs Valid disabled are usefu...

Page 62: ...Serial Commands Target Index Command R W Description 04 04 Mode Register W 0xM003 Enable Partial Scan 04 04 Mode Register W 0xM004 Disable Partial Scan M 0 Common both M 8 Free Run only M 4 Trigger only 04 0A PS Start Line R W Sensor Dependent 04 0B PS Stop Line R W Sensor Dependent Start Line Quick FAQ s 5p5 um CCDs do not have a fast dump gate PS purges unwanted lines of video data The stop line...

Page 63: ... by 2 0x0002 Divide sum by 4 0x0003 Divide sum by 8 Quick FAQ s Binning can be independently set for any horizontal and vertical combination Horizontal binning in and two channel camera link data modes do not function in all modes Vertical binning can overload the HCCD in bright images Binning can create super pixels in many sizes Vertical binning will increase the power consumption of the camera ...

Page 64: ...f the expo sure reaches the user defined maximum exposure At the point the AE is at maximum exposure it will switch to gain mode and increase the digital camera gain to attempt to brighten the image At the limits of the gain and exposure modes the AE will set internal mode bits that indicate to the user that an external Iris should be opened or closed If the user desires to disable gain or exposur...

Page 65: ...edefined Recce modes Easy setup The AE algorithm calculates a new exposure from the previous exposure the set point and the AED value One of two methods for the new exposure calculation can be used The first method is an iterative algorithm that uses the following equation NEW_EXPOSURE CURRENT_EXPOSURE AED SETPOINT EXP_DENOMINATOR NEW_GAIN CURRENT_GAIN AED SETPOINT GAIN_DENOMINATOR In this algorit...

Page 66: ...here are two major firmware versions of the AE algorithm To determine the release version you can read more register 5 bit 15 If this bit is set then you have the new time based algorithm The first release was based on primarily the free run mode and uses the free run erasure regis ter as the basis for setting exposure values The minimum and maximum exposure limits are set in units of erasure not ...

Page 67: ...he AE is setup for the following MaxGain 0x2000 2 0x maximum gain MinGain 0x1000 1 0x minimum gain MaxExposure 0x3F1 1009 dec 10 09 ms maximum exposure MinExposure 0x068 104 dec 1 04 ms minimum exposure MinBrightness Setpoint Hysteresis 0x2000 0x0100 0x1F00 MaxBrightness Setpoint Hysteresis 0x2000 0x100 0x2100 4 6 Exposure Auto Exposure Overview continued Exposure and Readout Dialog AE controls AE...

Page 68: ...rmine a stable area for the AE 04 20 AE max gain R W Maximum digital gain to use in AE 04 21 AE min gain R W Minimum digital gain to use in AE should be 0x1000 1 0X gain 04 22 AE max exposure R W maximum exposure time 04 23 AE min exposure R W Minimum exposure time 04 26 AE detector R Read by AE algorithm to determine bright ness of the image 04 31 AE detector Average R Running average of previous...

Page 69: ...r and is a 3 3V LVTTL signal The exposure detector measures the strobe signal in increments of the pixel clock Serial Commands Target Index Command R W Description 04 0e Strobe Control Write 0x0000 negative strobe polarity 0x0001 positive strobe polarity 0x0002 Active during free run 0x0003 Inactive during free run Always active during trigger Free Run Mode FRM STROBE Yellow trigger Blue LVAL Red ...

Page 70: ...Clamp Level R W 01 01 C Gain R W C channel controls 01 02 C Clamp Level R W 01 21 D Gain R W D channel controls 01 22 D Clamp Level R W Quick FAQ s Single tap data is sent through the B tap only Dual tap data is sent through both taps with the B tap on the left side and the A tap on the right side Two tap data is reorded in the FPGA TRO circuit An ADC maximum gain of 40dB is 100X Use the offset to...

Page 71: ...n Gain dB 5 1 0 0359 code Where code is the range of 0 to 1023 The optical black clamp loop removes residual offsets in the signal chain to track low frequency varia tions in the CCD s black level During the optical black shielded pixel interval on each line the ADC output is compared with a fixed black level reference set by the offset value The offset value can be programmed between 0 LSB and 25...

Page 72: ...cal black shielded pixel interval on each line the ADC output is compared with a fixed black level reference selected by the value in the clamp regis ter The Clamp level is programmed in 8 bit resolution If external digital clamping is used during the post pro cessing the black clamp can be disabled Quick FAQ s Each tap has its own ADC and thus its own clamp ing circuit Clamp values for each tap c...

Page 73: ...14 Page 73 Chapter 5 Image ProcessingRugged Machine Vision 5 0 Overview 5 1 Tap Reorder 5 2 Digital Gain Offset 5 3 Pixel Defect Correction 5 5 Look Up Table 5 5 Smear Reduction 5 6 Flat Field Correction 5 7 Automatic Tap Matcher 5 8 Histogram Equalization ...

Page 74: ... data is reorder to create a single corrected image c Video data is passed through the detectors in the reordered but unmodified format d The Video data is then optionally corrected for gross defects d The Video data is then optionally corrected for column gain d The data is then passed through an optional look up table LUT The LUT converts the 12 bit video data to any 12 bit value g The final pro...

Page 75: ...t 0x0006 TRO Right Start 0x0007 TRO Size Quick FAQ s TRO can be used to flip the image horizontally TRO mode is automatic in two tap operation Tap Reorder and Digital Gain Offset Circuits Active Imaging Area ADC A 12 bit data ADC B Tap Reorder Left Digital Gain and Offset Right Digital Gain and Offset Master Digital Gain and Offset Note This path shows A and B Taps being merged into one line at th...

Page 76: ... Master digital gain and offset MDGO are available on in FPGA revision E9 and above MDGO is independent of the Trigger and Free run modes MDGO is used for histogram equilization 04 36 Master Digital Gain R W 04 37 Master Digital Offset R W 04 38 Master DGO Enable R W 1 enable 0 disable Quick FAQ s DGO can be used to match taps when ADC gain and offset are not fine enough DGO is applied to each tap...

Page 77: ...W 0x0002 Enable PDC 0x0006 Disable PDC 0x0001 Enable CDC 0x0003 Disable CDC Quick FAQ s PDC is enabled for both trigger and free run modes PDC operates on pixels CDC operates on entire columns Up to 511 pixels or columns can be corrected PDC is applied after the digital gain offset and before Look Up Table Defect data is stored in EEPROM The load commands below assume correction data is already in...

Page 78: ...from EEPROM 04 46 Gamma LUT W Loads a gamma LUT where data is a number from 1 100 gamma 100 Note 45 dec 0x2D hex Quick FAQ s LUT s are 12 bit to 12 bit look up The most common use for a LUT is gamma correction In FPFA revision E8 the LUT s can be stored in the camera EEPROM and can be reloaded each time the camera is powered with a single command To save a LUT to EEPROM set the LUT mode to 0x0001 ...

Page 79: ...s follows Command Ack char Description w04450001FF Optional save to EEPROM while loading w0418000000 LUT load command Starts the LUT load sequence Send 4096 entries for the LUT high byte xxxx Loads a byte to the LUT where xxxx hex number high byte Example 0x1234 0x12 Indicates end of first sequence Send 4096 entries for the LUT low byte xxxx Loads a byte to the LUT where xxxx hex number low byte E...

Page 80: ...n details on these functions Serial Commands Target Index Command R W Description 04 FF Base Reset Write Resets camera mode to free run runs valid enabled no binning no partial scan no line or text displays no LUT no PDC no digital gain or offset no test pattern reset the LVAL and FVAL defaults AE Detector set to small size Auto tap matcher off Quick FAQ s The Base Reset is a convenient way to res...

Page 81: ...d R W Description 04 40 FFC table load W Loads FFC table based on mode 04 41 FFC test W Loads entire FFC table with data Where 0x1000 1x 0x1800 1 5x 04 42 FFC Master gain R W Sets master gain 04 43 FFC mode R W 0x0000 load from com port 0x0001 load from com port and save to EEPROM 0x0002 load from EEPROM 04 44 FFC table size R Returns FFC table size 04 04 Mode Register W 0x0011 Enable FFC 0x0012 D...

Page 82: ...ue to space constraints Note The table must be reloaded every time the camera is re powered All 8192 values must be loaded from the com port The EEPROM load sequence can also be used once the EEPROM table has been initialized 0 10 20 30 40 50 60 70 80 90 100 0 5 10 15 20 25 30 Angle degrees Relative Quantum Efficiency Horizontal Vertical 5 6 Image Processing Flat Field Correction Continued Micro L...

Page 83: ...er This data offset must be applied during the creation of the offset ta ble To create your own alignment test file simply create a FFC file then edit the center pixel gain value to be 32000 A white line will appear at the center point Note that the leftmost number in the FFC file data is not used by the loader and can be used for user reference of offset data 0 4096 1 4096 2 4096 3 4096 4 4096 20...

Page 84: ...for loading the FFC table is as follows Command Ack char Description w04421000F0 Sets the FFC master gain to 1 0x w04430001FF Optional FFC mode load from com port save to EEPROM w0440000000 FFC load command Starts the FFC load sequence Send SIZE entries for the FFC LUT high byte xxxx Loads a byte to the FFC LUT where xxxx hex number high byte Example 0x1234 0x12 Indicates end of first sequence Sen...

Page 85: ...se ATM are PCB and LCD inspection imaging with regular features and fixed patterns and PIV particle fields Serial Commands Target Index Command R W Description 09 00 Tap Match On Off R W 0 off 1 on 05 00 Camera mode R 0x0000 read mode register 1 04 11 OSD modes Write 0x000a enable color mode 0x000b disable color mode Quick FAQ s The ATM is designed to work with randomly changing images that presen...

Page 86: ...pter 6 DetectorsRugged Machine Vision 6 0 Overview 6 1 Brightness 6 2 Sharpness 6 3 Tap Matching 6 4 SNR 6 5 Raster Measurement 6 6 Temperature 6 7 Frame Counter 6 8 Built In Test 6 9 Exposure Time 6 10 White Balance GNU 6 11 Saturated Pixel Count 6 12 Exposure Histogram ...

Page 87: ...ectors measure the sharpness of the image and can be used for auto focus optics In addition to the detectors the windows of the detectors can be overlaid on the video image Detector Windows Each detector has its own window that it uses for analyzing the video data The Auto Exposure AED and Auto Focus AFD detectors and Signal to Noise Ratio SNR are updated on every image read from the sensor The Ta...

Page 88: ...19 Show Detectors W 0x0002 AE Window 0x0009 disable 04 1a Read Detectors R 0x0002 AE Window 03 03 0c 13 AE Detector Data Top Register Address R W Location in units of 16 lines 0x003d Set AE Top location 03 03 0c 13 AE Detector data Right Register Address R W Location in units of 16 pixels 0x003e Set AE Right location 03 03 0c 13 AE Detector data Left Register Address R W Location in units of 16 pi...

Page 89: ...t then the AFD value is INVALID Serial Commands Target Index Command R W Description 04 19 Show Detectors W 0x0003 AF Window 0x0007 AF Data in AF Window 0x0008 AF Data Full Screen 0x0009 disable 04 1a Read Detectors R 0x0003 AF Window Quick FAQ s The AFD window size is fixed in the center of the image If the high bit of the AFD is set then the data is not vaild Data can become invalid during a ASY...

Page 90: ...Two tap readout only reads image data out of A and B taps Serial Commands Target Index Command R W Description 04 19 Show Detectors W 0x0000 Tap A Crack 0x0001 Tap B Crack 0x0009 disable 04 1a Read Detectors Left Right R 0x0000 Tap A C Crack 0x0001 Tap B D Crack A and B when BIT5 of PIO x57 is 0 C and D when BIT5 of PIO x57 is 1 FE 0D Read Detectors Top Bottom R Top Line when BIT5 of PIO x57 is 0 ...

Page 91: ...ommand R W Description 04 19 Show Detectors W 0x0004 SNR Left 0x0005 SNR Right 0x0009 disable 04 1a Read Detectors R 0x0004 Left SNR Sum 0x0005 Left SNR Sum of Squares 0x0006 Left SNR Number of Samples 0x0007 Right SNR Sum 0x0008 Right SNR Sum of Squares 0x0009 Right SNR Number of Samples 0x000a Left SNR Max Value 0x000b Right SNR Max Value A and B when BIT5 of PIO x57 is 0 C and D when BIT5 of PI...

Page 92: ...n the black clamp must be raised SNR 20 log MAX Bmean Bsdev DNR MAX Bmean Bsdev BITS log DNR log 2 where BITS 4095 RMS noise in ADC counts Bsdev 1 0 C Code to Calculate SNR in DB fsum float snr_sum 16 16 is sum scale fsqr float snr_sqr 16 64 64 is mult scale fn float snr_n fmax float snr_max fblk_mean fsum fn fstd_dev sqrt fn fsqr fsum fsum fn fn 1 if fblk_mean 3 fstd_dev Make sure noise is measur...

Page 93: ... 0x0002 Read Lines per frame 0x0003 Read Active lines per frame in FVAL 04 14 Line of Interest R W Line number from top of image Plus FVAL start Quick FAQ s LVAL Line VALid This Camera Link signal indi cates when pixel data is valid with a line FVAL Frame VALid This Camera Link signal indicates when line data is valid with a Frame LVAL start and stop define a lines active pixels and are in some we...

Page 94: ...ach frame read has a unique count You can read the frame count immediately after the rising edge of FVAL The frame counter is displayed in the On Screen Serial Commands Target Index Command R W Description 04 1A Read Detector R 0x000A Frame Counter 04 1A Reset Frame Counter to Zero W 0x000A Reset to Zero Quick FAQ s The frame counter is a 16 bit counter that rolls over to zero when the maximum cou...

Page 95: ...ck FAQ s Temperature is read in degrees Celsius Temperature accuracy is 0 5 degrees Quick FAQ s Exposure is measure in pixel clock periods For a 40Mhz clock the period is 0 025us For a 30Mhz clock the period is 0 033us The maximum count is 4294967295 0xFFFFFFFF For a 40Mhz clock the maximum is 107 seconds For a 30Mhz clock the maximum is 143 seconds Trigger Transfer Pulse Strobe SUB Erase Exposure...

Page 96: ...mmand R W Description 04 1b Read WB GNU detector R 0x0019 clr0 GREEN RED 0x001a clr1 RED 0x001b clr2 BLUE 0x001c clr3 GREEN BLUE 04 35 WB GNU tap select R W 0x0000 left tap Power on default 0x0001 right tap Quick FAQ s To use the detectors for white balance place the detector location on a calibrated gray color patch and adjust the RGB values to be the same To use the detectors for GNU place the d...

Page 97: ...ctors R 0x001D Sat Pixels older version 03 03 0c 13 AE Detector Data Top Register Address R W Location in units of 16 lines 0x003d Set AE Top location 03 03 0c 13 AE Detector data Right Register Address R W Location in units of 16 pixels 0x003e Set AE Right location 03 03 0c 13 AE Detector data Left Register Address R W Location in units of 16 pixels 0x003c Set AE Left location 03 03 0c 13 AE Dete...

Page 98: ... window is provid ed This reference count can be used easily to calculate percentages of pixel counts within the bins Serial Commands Target Index Command R W Description 04 1a Read Bin and AED size values R 0x0011 Bin 0 0x0012 Bin 1 0x0013 Bin 2 0x0014 Bin 3 0x0015 Bin 4 sat pixels 0x0016 Number of pixels in 03 03 0c 13 AE Histogram Point Register Address R W Location in histogram bin point in un...

Page 99: ...ations Manual Revision Copyright illunis LLC 2014 Page 99 Chapter 7 OSDisplaysRugged Machine Vision 7 0 Overview 7 1 Text 7 2 Line Plot 7 3 Column Plot 7 4 Synthetic Patterns 7 5 Detector Display 7 6 Histogram ...

Page 100: ... Text can have transparent or opaque backgrounds Display a plot of video data with Horizontal line plot or Vertical column plot display Selectable line column of interest for display Selectable baseline position for the plot data Scalable plot size from 1 pixel to full scale 4095 Plot can be drawn as a single line or as a bar plot All data can be plotted including the over scan areas In addition t...

Page 101: ...cter or screen memory location To access one of the 128 character memories as 16 lines of data per character the OSD address is formatted as a 16 bit word To access one of the screen memory locations 128 columns and 32 lines the OSD address is formatted with the upper byte as row address and the lower byte as column address as a 16 bit word Since the OSD text is limited to a 128x32 array of 8x16 b...

Page 102: ... window 0x0004 disable 2X window 0x0005 enable OSD Raster 0x0006 enable OSD Revision 0x0007 enable OSD Frame Counter 0x0008 enable OSD WB GNU 0x0009 enable OSD AE 0x000C enable OSD Serdes to AFEs 0x000D enable OSD Blk Clamp BIT 04 16 ODS Text Window X location R W Increments of 16 pixels 04 17 OSD Text Window Y location R W Increments of 16 lines On Screen Text Display Sensor Performance Informati...

Page 103: ...Copyright illunis LLC 2014 Page 103 On Screen Text Display Raster Size Information On Screen Text Display Real time frame counter and exposure On Screen Text Display White Balance GNU 0 255 range On Screen Text Display Auto Exposure ...

Page 104: ... which requires two commands a data set and a address top write to The ASCII font is included in the default font as well as some special characters If you write an application to display all character values from 0 to 127 you can see the entire character set as seen in the image below Horizontal Index This register selects the horizontal location where the OSD character will be written Vertical I...

Page 105: ...s The scale and offset allow 12 bit data to be drawn on a 4Kx4K image Only the first 4096 data points of a line may be displayed lines longer that 4096 will wrap Serial Commands Target Index Command R W Description 04 11 OSD lines W 0x0000 disable line plot 0x0001 line plot 0x0008 draw as line 0x0009 draw as filled 04 12 Line Plot Offset R W 04 13 Line Plot Scale R W 04 14 Line Plot Line of Intere...

Page 106: ...ine plot 0x0002 column 0x0008 draw as line 0x0009 draw as filled 04 12 Line Plot Offset R W 04 13 Line Plot Scale R W 04 14 Line Plot Line of Interest R W Quick FAQ s The column plot display is one frame behind it s measurement frame This is due to the fact the the data must be measured then stored for display on the following frame The line column can be scaled from 1X to 1 4096X 4096 pixels to 1...

Page 107: ...h and Camera Link communications Serial Commands Target Index Command R W Description 04 06 Test Pattern W 0x0000 Normal Video 0x0001 Input CCD Test Pattern 0x0002 Output Test Pattern Quick FAQ s The input test pattern can be used to test the inter nal data path of the RMV FPGA The Output test pattern can be used to test the Camera Link digital communication path Output Test Pattern Input CCD Test...

Page 108: ... reference Serial Commands Target Index Command R W Description 04 19 Show Detectors W 0x0000 Tap A Crack 0x0001 Tap B Crack 0x0002 AE Window 0x0003 AF Window 0x0004 SNR Left 0x0005 SNR Right 0x0006 Cross hair 0x0007 AF data 0x0008 AF data window screen 0x0009 disable 0x000A Blooming Quick FAQ s Some windows are in the non visible regions of the sensor You can see these regions by changing the LVA...

Page 109: ...p or bottom 512 counts using the histogram zoom function Serial Commands Target Index Command R W Description 04 11 OSD histogram line plot W 0x0000 Disable plots 0x000C Enable Histogram display 0x000D Histogram Zoom low 512 0x000E Histogram Zoom high 512 04 12 Plot Offset R W 04 13 Plot Scale R W Quick FAQ s The histogram plot display is one frame behind it s measurement frame This is due to the ...

Page 110: ...perations Manual Revision Copyright illunis LLC 2014 Page 110 Chapter 8 Camera LinkRugged Machine Vision 8 0 Overview 8 1 Pixel Format 8 2 Channel Format 8 3 FVAL LVAL 8 4 Raster Detectors 8 5 Over Scan Mode ...

Page 111: ...e transmitted on the Camera Link bus The four Enable signals are FVAL Frame Valid is defined HIGH for valid lines LVAL Line Valid is defined HIGH for valid pixels DVAL Data Valid is defined HIGH for valid data SPARE undefined for future use Four LVDS pairs are reserved for general purpose camera control They are defined as camera inputs and frame grabber outputs The signals are CC1 CC2 CC3 CC4 The...

Page 112: ...R W Description 04 0d Bit Width W 0x0000 12 bit mode 0x0001 10 bit mode 0x0002 8 bit mode 0x0003 Bottom 8 bits as Msb Quick FAQ s Bottom 8 is very useful for evaluating camera noise Kodak sensors rated at 60dB SNR have about 10 clean bits dynamic range 8 Bit pixel data is packed in single bytes and thus requires 1 2 the system bandwidth that the 10 and 12 bit formats require Sensor ADC pixel sampl...

Page 113: ...03 Swapped order dual channel Quick FAQ s Don t confuse Single Dual Channel with Single Dual CCD tap modes Single channel output requires a pixel clock of twice the frequency of the dual channel mode Some PCI Camera Link cards have a maximum pixel clock frequency of 66Mhz With an RMV camera operating in two tap mode at 40Mhz the pixel rate is 80Mhz greater than the card can han dle The camera must...

Page 114: ...on system save and must be reprogrammed each time they are Serial Commands Target Index Command R W Description 04 1b System Registers R 0x0008 LVAL Start 0x0009 LVAL Stop 0x000a FVAL Start 0x000b FVAL Stop 04 27 System Registers W 0x0008 LVAL Start 0x0009 LVAL Stop 0x000a FVAL Start 0x000b FVAL Stop Quick FAQ s LVAL Line VALid This Camera Link signal indi cates when pixel data is valid with a lin...

Page 115: ... clock rate The frame CRC is used in the built in test functions of the camera Serial Commands Target Index Command R W Description 04 1b System Registers R 0x0000 Pixels per line 0x0001 Active pixels per line 0x0002 Lines per frame 0x0003 Active lines per frame 0x0012 Exposure counter low word 0x0013 Exposure counter high word 0x0014 Frame CRC Quick FAQ s Active pixels per line LVAL active pixel ...

Page 116: ...ice to sample the extra pixels Serial Commands Target Index Command R W Description 04 08 Over scan mode W 0x0000 Disable over scan mode 0x0001 Enable over scan mode Quick FAQ s CCD sensors have special pixels that are used to measure performance and optical black Optical black pixels are shielded from light by metal that covers the pixels Most cameras only output the active pixels of the sensor O...

Page 117: ...mple RMV 2001 with 40 000Mhz clock with TPD 900 gives Exposure 9 0us 30 0us 900 6 1 600us 2890 8us 2 89ms Notes 1 Min E Register value is 1 for all cameras 2 Calculated from FPGA values 3 Calculated from PPL and pixel clock The Free run exposure time can be calculated with the following equation Exposure MinTime MaxEReg EReg LineTime Where MinEReg EReg MaxEReg RMV Free Run Timing FPGA Rev DB Camer...

Page 118: ...perations Manual Revision Copyright illunis LLC 2014 Page 118 Chapter 10 Frame GrabberRugged Machine Vision 10 0 Overview 10 1 One Tap Readout 10 2 Two Tap Readout 10 3 Four Tap Readout 10 4 Trigger Options ...

Page 119: ...elow show a one tap readout One image path from the CCD at 40Mhz is processed and sent to the frame grabber on one CameraLink channel Tap If the RMV is set to two tap readout the camera output the two taps on two channels of the CameraLink bus In the diagram below show a two tap readout Two image paths from the CCD at 40Mhz is processed and sent to the frame grabber on two CameraLink channels Taps...

Page 120: ... CCD at 40Mhz is processed and sent to the frame grabber on two CameraLink channels Taps The rate of data sent to the frame grabber is doubled to compensate for twice the data enter ing the camera electronics The frame grabber get the image as if it were a two tap camera One tap is left to right top to middle The other tap is left to right bottom to middle CCD Camera Electronics Frame Grabber 4 Pa...

Page 121: ...ns Manual Revision Copyright illunis LLC 2014 Page 121 10 1 Frame Grabber One Tap Readout The picture below shows a configuration for a 4M camera in One Tap Readout mode The Camera Geometry is One Tap Left to Right ...

Page 122: ... mode The Camera Geometry is Two Tap Interleaved In this configuration the Data Valid is Disabled This tells the frame grabber to ignore the DVAL signal from the camera The DVAL is only important when horizontal binning is being used If the user wishes to bin a two tap camera this needs to be Enabled This active pixels and lines would also need to be set to the correct values ...

Page 123: ...lunis LLC 2014 Page 123 10 3 Frame Grabber Four Tap Readout The picture below shows a configuration for a 4M camera in Four Tap Readout mode The Camera Geometry is Custom Configuration The custom setting are shown set up in the Dialog box below ...

Page 124: ... the trigger signal to the camera In this configuration the frame grabber is set to send a high pulse on 10000 us down the CC1 line every 2 5Hz It is important to enable the internal frame trigger when using the CC1 trigger signal But if the camera is in Free Run you may want this to be disabled The frame grabber will update the screen at 2 5Hz in free run mode even if the camera can run faster ...

Page 125: ... RMV Camera Capture Card Lemo 6 Connector Strobe Out 12V DC In Camera Link Connector 5 Pairs of video data 4 data and 1 clock 2 Pairs of com data Send and Receive 4 pairs of camera control CC1 CC2 CC3 CC4 Where CC1 trigger Lens User Computer Camera Link Cable Capture Card Drivers Users Imaging Software ...

Page 126: ...e camera ADC s FAQ 4 How do I set the tap mode single and dual See Section 3 command 04 00 for specifics FAQ 5 How do I set the ADC pre gain See Section 4 command 04 06 for specifics FAQ 6 What camera link data formats are used The RMV cameras with Camera Link use the base configuration of the CL spec The RMV uses the 1 or 2 tap 8 10 or 12 bits per tap camera link setting The RMV cameras has featu...

Page 127: ...le 1 1 command 04 09 04 0a and 04 0b for specifics Note that if you are using a color Bayer pattern sensor you will need to se lect your start line carefully so that the color processing hardware or soft ware receives the proper data Note the HDTV sensor does not support par tial scan FAQ 9 What is binning and how do I use it Binning is a special readout mode where the camera bins or combines pixe...

Page 128: ...n from the main VGA amplifier Consult the Analog Devices AD9845A data sheet for more information at www analog com Note that there is a gain register for each of the two Green pixels in the Bayer pattern You must set both green gains to achieve correct white balance In practice the green color filters have slightly different responses must be set correctly to eliminate color pattern problems The c...

Page 129: ... get a gain factor gain factor 10 gaindB 20 Thus for a KAI 4010 with 16uV e we get 1 count 244 x 2 gain factor 16 electrons From the ADC max count we can calculate well depth FAQ 14 What gains and offsets does the camera have The RMV has several stages of gain and offset that are applied to the image data 1 PxGA 4dB 6dB Analog gain applied to each of the four Bayer pattern colors Red Red Green Blu...

Page 130: ...Another way to describe the channels is to refer to them as pixels Thus for each clock cycle of the camera link transport either a single pixel or two pixels can be transferred The two channel mode can transfer twice the data for a given clock rate and thus reduces the pixel clock and camera power FAQ 16 How do I see the optical black pixels The RMV firmware release D9 has a new mode called oversc...

Page 131: ...ne which of the possible correction values are used This allows the PDM to op erate and a maximum of 80 Mhz FAQ 19 What IR UV filter should I use with the color sensors The color Bayer pattern sensors require the use of a UV IR filter to obtain the best response when processing image data The filter that we use is B W UV IR CUT part number 486 with a 52mm thread It can be purchased from www edmund...

Page 132: ...so camera frames w040d000000 12 bit camera link readout mode w04000001ff Dual tap interleaved data mode forces dual channel CL w041e1000f0 AE set point to 0x1000 Depends on sensor and lens w041d0001ff Activate Auto Exposure Example Triggered Auto Exposure camera to output only triggered frames Free run in 4x4 binning for faster AE performance In this example the camera will free run in a 4x4 binne...

Page 133: ...rol requires different gain range values The old D5 analog gain was 0 1023 with a nominal setting in the 200 s range The new firmware using digital gain requires a fixed point number from 0 to 0xFFFF where a gain of 1 0x 0x1000 and a gain of 16x 0xFFFF The microcontroller revision 2DB using FPGA revision DB adds a special D5 compatibility mode that uses the older analog gain method This compatibil...

Page 134: ...nly default and command and data Consider the command packet wCCIIDDDDSS where CC command II Index DDDD da ta and SS checksum For the data only we use a C function as follows UINT8 CheckSum UINT16 twobytes UINT8 checksum byte0 byte1 byte0 twobytes 0x00ff byte1 twobytes 8 0x00ff checksum byte0 byte1 checksum 256 checksum return checksum The checksum for the data only is SS CheckSum DDDD For the che...

Page 135: ...ife support dev ice or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system or to affect its safety or effectiveness illunis assumes no liability for applications assistance or customer product design Illunis does not warrant or represent that any license either express or implied is granted under any patent right copyright mask work ...

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