IDT 89HPES34H16, User Manual, Page: 77 / 182

IDT SMBus Interfaces
PES34H16 User Manual 6 - 19 October 30, 2008
Notes
The FUNCTION field in the command code indicates if the SMBus operation is a CSR register read/
write or a serial EEPROM read/write operation. Since the format of these transactions is different. They will
be described individually in the following sections.
If a command is issued while one is already in progress or if the slave is unable to supply data associ-
ated with a command, then the command is NACKed. This indicates to the master that the transaction
should be retried.
CSR Register Read or Write Operation
Table 6.16 indicates the sequence of data as it is presented on the slave SMBus following the byte
address of the Slave SMBus interface.
4:2 FUNCTION This field encodes the type of SMBus operation.
0 - CSR register read or write operation
1 - Serial EEPROM read or write operation
2 through 7 - Reserved
6:5 SIZE This field encodes the data size of the SMBus transaction.
0 - Byte
1 - Word
2 - Block
3 - Reserved
7 PEC This bit controls whether packet error checking is enabled for the cur-
rent SMBus transaction.
0 - Packet error checking disabled for the current SMBus transaction.
1 - Packet error checking enabled for the current SMBus transaction.
Byte
Positio
n
Field
Name
Description
0 CCODE Command Code. Slave Command Code field described in Table
6.15.
1 BYTCNT Byte Count. The byte count field is only transmitted for block type
SMBus transactions. SMBus word and byte accesses do not contain
this field. The byte count field indicates the number of bytes following
the byte count field when performing a write or setting up for a read.
The byte count field is also used when returning data to indicate the
number of following bytes (including status). Note that the byte count
field does not include the PEC byte if PEC is enabled.
2 CMD Command. This field encodes fields related to the CSR register read
or write operation.
3 ADDRL Address Low. Lower 8-bits of the doubleword CSR system address
of register to access.
4 ADDRU Address Upper. Upper 6-bits of the doubleword CSR system
address of register to access. Bits 6 and 7 in the byte must be zero
and are ignored by the hardware.
5 DATALL Data Lower. Bits [7:0] of data doubleword.
Table 6.16 CSR Register Read or Write Operation Byte Sequence (Part 1 of 2)
Bit
Field
Name
Description
Table 6.15 Slave SMBus Command Code Fields (Part 2 of 2)