27
iO1000 Detailed Service Manual - THEORY OF OPERATION
Figure 13. Digital Block Diagram
REDCAP
The REDCAP IC (U801) integrates a reduced instruction-set computer (RISC)
microprocessor (MCU) and a general-purpose Digital Signal Processor (DSP) on
a single chip (Figure 14 on page 29).
The following is a summary of the REDCAP IC key features:
¥
RISC integer processor running up to 16.8 MHz at 1.8Vdc, a 32-bit RISC archi-
tecture, high performance and high code density
¥
SPS 56600 NDE-UL DSP core running up to 58.8 MHz at 1.8Vdc
¥
Fully-programmable PLL for system clock generation with low-output clock
drivers
FLASH
U802
SRAM
U803
GCAP II
U001
Integrated Audio
and DC Voltage
Converter/Regulator
30 pin ZIF CONNECTOR J4
TO TRANSCEIVER
(RF BOARD)
REDCAP
U801
DSP
RAM
ROM
MDI
RAM
ROM
MCU
SAP
TIMER
BBP
L1 Timer
TIMER
UART
E I M
RS232/SB9600
60 pin Inter-board Connector P1
EXTERNAL
POWER
SUPPLY
EXTERNAL
AUDIO
PCM
CODEC
REGULATED
P. SUPPLY
UNREGULATED
P. SUPPLY
SPI Bus
Chip Selects
DATA BUS
ADDRESS
BUS
CS0
CS2
QSPI
