7
iO1000 Detailed Service Manual - THEORY OF OPERATION
Transmitter Path Section
This section includes a quasi-linear class AB power amplifier (PA) for linear mod-
ulation of the iDEN portables. When the unit is transmitting data, the digital data
is sent to the DSP. When an audio is used, microphone audio is routed to the
CODEC, where it is amplified and digitized by the A/D converter in the CODEC.
13-bit data is then sent from the CODEC to the DSP for processing.
Figure 4 illustrates the transceiver circuitry path.
Figure 4. Transceiver Circuitry Path
The DSP performs VSELP data compression and generates digital I & Q words to
be transmitted to the ADDAG. The signal then is sent to ADDAG at a rate of
48 K samples per second. The ADDAG provides the serial clock to the DSP and a
frame sync pulse to tell the DSP to send a sample. Each sample is sent as a 16-bit
I word followed by a 16-bit Q word and then some meaningless fill bits.
The I word and the Q word are then converted to an analog differential pair by the
ADDAG and amplified. The ADDAG also sends a 2.4MHz reference clock signal
to the ODCT, together with a differential TSLOT pair that toggle whenever a TXE
signal is received from the DSP. Once the TSLOT toggles, data is sent from the
DSP
ADDAG
ODCT
PA
ISOLATOR
MAIN VCO
OFFSET VCO
REF. OSC.
A/S
ANTENNA
IMAGE
FILTER
HOST
REDCAP
Control
Circuitry
MUX
DIGITAL
DATA
U001 (GCAP)
MICROPHONE
TXE
SERIAL
DATA
TSLOT
fo +150.9MHz
301.8MHz
TCLK
DATA
ASW
VBLIN
VNCTO
DSP CLK
SERIAL CLK
A/D CONV.
DIGITIZED
V
OICE
SPI CLK
VCONTROL
VDP
SP I/O
16.8MHz
Level
Shifter
