HP 87114B, Service Manual

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T able 4-1. HP 8711B/12B/13B/14B Self-T ests (continued)
T est T est Name Applicable Error Messages and Notes
4 Main DRAM Errors:
Memory size too small.
Bus error .
At address <num>, write <num> read <num>.
RAM bit errors: <num>
RAM refresh errors: <num>
T est checks size of main DRAM, writes/reads test patterns . Check reported size of
DRAM on power-up display . Memory size should be about 4 MB .
Replace CPU board or check the following:
DRAM control circuitry U38-U41
DRAM data interface chips U69, U84
DRAM address MUX U37, U58, U59, U86, U88
DRAM chips U61-U68
5 SIMM DRAM Errors: same as for test #4.
T est checks size of SIMM DRAM, writes/reads test patterns . Check reported size of
SIMM DRAM on power-up display . Normally 0.
Make sure SIMMs (if any) are installed properly: they must be installed in pairs ,
and larger size ones should be in bank 0.
Check switch setting on S2. All switches should be open (up), except for switch 1
if bank 0 contains 256 kB SIMMs , switch 2 if bank 0 contains 1 MB SIMMs , or
switch 3 if bank 0 contains 4 MB SIMMs . Use of four 256 kB SIMM DRAMs is not
supported.
If problem persists , replace CPU or check the following:
Control circuitry U31, U38
Data buers U76, U77
A ddress MUX U50, U74, U75
6 340x0 GSP Processor T est not implemented
7 GSP Video T est not implemented
8 (number not used) T est number not used because test status LED powers up with this as default. An
\8" on the LED indicates the 68020 was unable to power-up and execute basic
instructions .
9 DSP SRAM Errors: same as for test #4.
Checks program SRAM used by the digital signal processor . Typical memory size
about 65536 bytes .
Replace CPU , or check SRAM chips U79 and U94; and chips U73, U41, U85, U93,
U60, and U89.
10 320C25 DSP Processor T est not implemented.
11 68020 & 320C25
Communication
T est not implemented.
12 Backplane Bus Errors:
Reference clock not toggling.
Unable to gain control of DSP bus .
Cannot perform backplane bus tests .
A ccess error: wrote <num>, read <num>, right shift = <num>
Source board: F ailed self-test.
Receiver board: F ailed self-test.
T est reads version numbers from fractional-N/ref, source , and receiver boards .
Checks for 5 MHz clock from fractional-N/reference board.
Make sure all boards are pushed in and making good contact with backplane .
Check 10 MHz output from A3J3. If not found, see \Troubleshooting Source
Group Problems ." Replace CPU or check U21 and U22.
4-10 T roubleshooting and Block Diagrams