MAN0974-14-EN_XL7_XL7P_UM
July 6, 2022
Page 99 | 199
9.4
HSC Functions Register Map
The register assignments for the high-speed I/O can be moved via a setting in Cscape. The values shown
are the DEFAULT values and may not match the same starting point as the values shown below.
Table 9.3
–
HSC Functions Register Map for 2 HSC Configuration
Register
Frequency
Pulse
Totalize
Quad
%AI401-402
Accumulator - Counter 1
%AI403-404
Latch Value
–
Counter 1
%AI405-406
Accumulator
–
Counter 2
%AI407-408
Latch Value
–
Counter 2
%AQ401-402
Preload
–
Counter 1
%AQ403-404
Match1
–
Counter 1
%AQ405-406
Match2
–
Counter 1
%AQ407-408
Preload
–
Counter 2
%AQ409-410
Match1
–
Counter 2
%AQ411-412
Match2
–
Counter 2
%AQ413-424
Reserved
%Q1601
Latch
–
Counter 1
%Q1602
Preload
–
Counter 1
%Q1603
Clear
–
Counter 1
%Q1604
Disable
–
Counter 1
%Q1605
Direction
–
C 1
%Q1606
Output Reset
–
Counter 1
%Q1607
Preload Disable
–
Counter 1
%Q1608
Latch Disable
–
Counter 1
%Q1609
Disable Marker
–
C1
%Q1610
Latch Marker
–
C1
%Q1611
Preload Marker
–
C1
%Q1612
Clear Marker
–
C1
%Q1613-1616
Reserved
%Q1617
Latch
–
Counter 2
%Q1618
Preload
–
Counter 2
%Q1619
Clear
–
Counter 2
%Q1620
Disable
–
Counter 2
%Q1621
Direction
–
C2
%Q1622
Output Reset
–
Counter 2
%Q1623
Preload Disable
–
Counter 2
%Q1624
Latch Disable
–
Counter 2
%Q1625
Disable Marker
–
C2
%Q1626
Latch Marker
–
C2
%Q1627
Preload Marker
–
C2
%Q1628
Clear Marker
–
C2
%I1601
Overflow Flag
–
Counter 1
%I1602
Underflow Flag
–
Counter 1
%I1603
High Speed Out 1
%I1604
Reserved
%I1605
Overflow Flag
–
Counter 2
%I1606
Underflow Flag
–
Counter 2
%I1607
High Speed Out 2
%I1608
Reserved