Holtek HT66F002, Manual

Page: 125 / 144

Rev. 1.71 124 April 11, 2017 Rev. 1.71 125 April 11, 2017
HT66F002/HT66F0025/HT66F003/HT66F004
Cost-Effective A/D Flash MCU with EEPROM
HT66F002/HT66F0025/HT66F003/HT66F004
Cost-Effective A/D Flash MCU with EEPROM
Mnemonic Description Cycles Flag Affected
Data Move
MOV A,[m] Move Data Memory to ACC 1 None
MOV [m],A Move ACC to Data Memory 1 Note None
MOV A,x Move immediate data to ACC 1 None
Bit Operation
CLR [m].i Clear bit of Data Memory 1 Note None
SET [m].i Set bit of Data Memory 1 Note None
Branch
JMP addr Jump unconditionally 2 None
SZ [m] Skip if Data Memory is zero 1 Note None
SZA [m] Skip if Data Memory is zero with data movement to ACC 1 Note None
SZ [m].i Skip if bit i of Data Memory is zero 1 Note None
SNZ [m].i Skip if bit i of Data Memory is not zero 1 Note None
SIZ [m] Skip if increment Data Memory is zero 1 Note None
SDZ [m] Skip if decrement Data Memory is zero 1 Note
None
SIZA [m] Skip if increment Data Memory is zero with result in ACC 1
Note
None
SDZA [m] Skip if decrement Data Memory is zero with result in ACC 1
Note
None
CALL addr Subroutine call 2 None
RET Return from subroutine 2 None
RET A,x Return from subroutine and load immediate data to ACC 2 None
RETI Return from interrupt 2 None
Table Read
TABRD [m] Read table (specific page) to TBLH and Data Memory 2 Note None
TABRDC [m] Read table (current page) to TBLH and Data Memory 2 Note None
TABRDL [m] Read table (last page) to TBLH and Data Memory 2 Note None
Miscellaneous
NOP No operation 1 None
CLR [m] Clear Data Memory 1 Note None
SET [m] Set Data Memory 1 Note None
CLR WDT Clear Watchdog Timer 1 TO, PDF
CLR WDT1 Pre-clear Watchdog Timer 1 TO, PDF
CLR WDT2 Pre-clear Watchdog Timer 1 TO, PDF
SWAP [m] Swap nibbles of Data Memory 1 Note None
SWAPA [m] Swap nibbles of Data Memory with result in ACC 1 None
HALT Enter power down mode 1 TO, PDF
Note: 1. For skip instructions, if the result of the comparison involves a skip then two cycles are required, if no
skip takes place only one cycle is required.
2. Any instruction which changes the contents of the PCL will also require 2 cycles for execution.
3. For the "CLR WDT1" and "CLR WDT2" instructions the TO and PDF flags may be affected by the
execution status. The TO and PDF flags are cleared after both "CLR WDT1" and "CLR WDT2"
instructions are consecutively executed. Otherwise the TO and PDF flags remain unchanged.